CY8CLED16P01-48LFXI Cypress Semiconductor Corp, CY8CLED16P01-48LFXI Datasheet - Page 45

• Manufacturer Part Number: CY8CLED16P01-48LFXI
• Description: IC PLC PSOC CMOS LED 16CH 48VQFN
• Manufacturer: Cypress Semiconductor Corp
• Series: PowerPSoC® CY8CLEDr

Specifications of CY8CLED16P01-48LFXI

• Core Processor: M8C
• Core Size: 8-Bit
• Speed: 24MHz
• Connectivity: I²C, IrDA, SPI, UART/USART
• Peripherals: LED, PLC, POR, PWM, WDT
• Number Of I /o: 44
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 4.75 V ~ 5.25 V
• Data Converters: A/D 4x14b; D/A 4x9b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 48-VQFN Exposed Pad, 48-HVQFN, 48-SQFN, 48-DHVQFN
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 770-1000 - ISP 4PORT FOR CYPRESS PSOC MCU
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

15. Document History Page
Document Number: 001-49263 Rev. *E
Document Title: CY8CLED16P01 Powerline Communication Solution
Document Number: 001-49263
Rev.
*A
*B
*C
*D
*E
**
ECN No.
2575716
2731927
2748537
2752799
2759000
2778970
GHH/PYRS
GHH/HMT/
Orig. of
Change
DSG
GHH
GHH
GHH
FRE
Submission
09/02/2009 Fixed typos in the data sheet.
10/05/2009 Added a table for DC POR and LVD Specifications
See ECN
10/01/08
08/17/09
07/06/09
Date
New Datasheet
Added
- Configurable baud rates and FSK Frequencies
- PLC Pod Kits for development purposes
Modified
- Pin information for all packages
Added Sections on ‘Getting Started’ and ‘Document Conventions’
Modified the following Electrical Parameters
- FIMO6 Min: Changed from 5.75 MHz to 5.5 MHz
- FIMO6 Max: Changed from 6.35 MHz to 6.5 MHz
- SPIS (Maximum input clock frequency): Changed from 4.1 ns to 4.1 MHz
- TWRITE (Flash Block Write Time): Changed from 40 ms to 10 ms
Posting to external web.
Updated
Updated DC GPIO, AC Chip-Level, and AC Programming Specifications as
follows:
- Modified FIMO6, TWRITE, and Power Up IMO to Switch specifications
- Added IOH, IOL, DCILO, F32K_U, TPOWERUP, TERASEALL, and
SRPOWER_UP specifications
Added 48-Pin QFN (Sawn) package diagram and CY8CLED16P01-48LTXI and
CY8CLED16P01-48LTXIT part details in the Ordering Information table
Updated section 5 and Tables 10-1, 10-2, and 10-3 to state the requirement to
use the external crystal for PLC protocol timing
Table 10-1 and Figure 10-1: Changed pins 9 and 25 from NC to RSVD
Table 10-2 and Figure 10-2: Changed pins 7 and 39 from NC to RSVD
Table 10-3 and Figure 10-3: Changed pins 14 and 77 from NC to RSVD
Tables 10-1, 10-2, 10-3: Added explanation to Connect a 0.1 uF capacitor
between XTAL_Stability and VSS.
Fixed minor typos
Figure 1-2.
on page 2 and
Description of Change
Figure 3-1.
on page 10.
CY8CLED16P01
Page 45 of 46
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