CY8CLED16P01-48LFXI Cypress Semiconductor Corp, CY8CLED16P01-48LFXI Datasheet - Page 8

• Manufacturer Part Number: CY8CLED16P01-48LFXI
• Description: IC PLC PSOC CMOS LED 16CH 48VQFN
• Manufacturer: Cypress Semiconductor Corp
• Series: PowerPSoC® CY8CLEDr

Specifications of CY8CLED16P01-48LFXI

• Core Processor: M8C
• Core Size: 8-Bit
• Speed: 24MHz
• Connectivity: I²C, IrDA, SPI, UART/USART
• Peripherals: LED, PLC, POR, PWM, WDT
• Number Of I /o: 44
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 4.75 V ~ 5.25 V
• Data Converters: A/D 4x14b; D/A 4x9b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 48-VQFN Exposed Pad, 48-HVQFN, 48-SQFN, 48-DHVQFN
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 770-1000 - ISP 4PORT FOR CYPRESS PSOC MCU
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

Equations 2 and 3 are used to determine how many digital blocks
are needed by a DSPWM. The total dimming resolution of a
DSPWM modulator is the total of the hardware PWM modulation
resolution and extra resolution added by Delta Sigma modulation
in the software. Equation 3 shows that the number of digital
blocks needed is only determined by the hardware resolution.
These equations show that more dimming resolution is achieved
with a DSPWM modulator than with a PWM or PrISM modulator.
A DSPWM modulator requires more code space and execution
time to use.
Equations 1, 2, and 3 determine the number of digital blocks
required by one modulator. The total number of blocks for all
modulators is determined by adding up the digital blocks needed
by each modulator used in the device.
The CY8CLED16P01 device has a variety of LED dimming
configurations. Because it has 16 digital blocks, it can implement
eight 16-bit PWM modulators, eight 12-bit PrISM modulators, or
sixteen 12-bit DSPWM modulators (assuming the software
resolution is 4 bits). As another example, it can implement four
10-bit PrISM modulators and still have 8 digital blocks left over
to implement other digital functions.
The CY8CLED16P01 is a one-device solution for powerline
communication and HB LED control. For an application that runs
powerline communication and HB LED control simultaneously,
the CY8CLED16P01 can implement four 16-bit PWM
modulators, four 12-bit PrISM modulators, or eight 12-bit
DSPWM modulators (assuming the software resolution is 4 bits).
2.2 Color Mixing Algorithm
Code algorithms to implement color mixing functionality work
well with EZ-Color controllers. Color mixing algorithms convert a
set of color coordinates that specify a color into the appropriate
8-bit dimming values for the LED dimming modulators. This
enables the EZ-Color controller to be communicated on a higher
level and maintain desired color and brightness levels.
The basic 3-channel color mixing firmware performing 8-bit LED
dimming requires three 8-bit dimming blocks. The discussion on
LED dimming modulation implies that it consumes three digital
blocks. The addition of a simple temperature compensation
algorithm using a thermistor consumes an additional digital block
and analog block (for the ADC).
Document Number: 001-49263 Rev. *E
n
DigBlocks
Total
=
n
SW
DSPWM
+
n
HW
=
n
HW
8
Equation 3
Equation 2
If the dimming resolution is increased, the number of digital
blocks needed should be calculated accordingly.
2.3 LED Temperature Compensation
Many HB LED systems need to measure analog signals. One or
more thermistors are often present to measure temperatures of
the system and the LEDs. The CY8CLED16P01 measures an
analog signal with an analog-to-digital converter (ADC). The
device can implement a variety of flexible ADC implementations.
The ADCs cover a wide range of resolutions and techniques and
use varied number of digital and analog block resources. For help
in selecting from this multitude of ADCs, refer to application note
AN2239, Analog – ADC Selection on http://www.cypress.com.
When designing with an EZ-Color device, the number of digital
and analog blocks used by an ADC must be factored into the total
number of digital and analog blocks that are used.
In a typical case, such as the 3-channel color mixing firmware IP
developed by Cypress, the simple 8-bit incremental ADC is used.
This module occupies one digital and one switched capacitor
analog block.
Analog blocks come in two types: continuous time and switched
capacitor blocks. The former enables continuous time functions
such as comparators and programmable gain amplifiers. The
switched capacitor blocks enable functions such as ADCs and
filters.
Temperature sensors with an I
instead of raw thermistors, thereby eliminating the need for
ADCs and complicated processing.
2.4 ColorLock Algorithm
ColorLock functionality uses feedback from an optical sensor in
the system to adjust the LED dimming modulators correctly to
“lock on” to a target color. This is similar to the concept of temper-
ature compensation because it compensates for change in color.
Instead of indirectly measuring change in color through temper-
ature, it senses actual change in color and compensates for it.
The ColorLock algorithm implemented by Cypress requires the
use of 10 digital blocks. Due to a 9-bit PrISM implementation, 6
digital blocks are used for dimming as in Equation 1. A 16-bit
PWM and two 8-bit timers are also used to form the frame
generator, pulse counter, and debounce counter.
2
C interface can also be used
CY8CLED16P01
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