MC908JL16CSPE Freescale Semiconductor, MC908JL16CSPE Datasheet - Page 27

• Manufacturer Part Number: MC908JL16CSPE
• Description: IC MCU 16K FLASH 8MHZ 32-SDIP
• Manufacturer: Freescale Semiconductor
• Series: HC08r

Specifications of MC908JL16CSPE

• Core Processor: HC08
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: I²C, SCI
• Peripherals: LED, LVD, POR, PWM
• Number Of I /o: 26
• Program Memory Size: 16KB (16K x 8)
• Program Memory Type: FLASH
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 13x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 32-SDIP (0.400", 10.16mm)
• Controller Family/series: HC08
• No. Of I/o's: 26
• Ram Memory Size: 512Byte
• Cpu Speed: 8MHz
• No. Of Timers: 2
• Embedded Interface Type: I2C, SCI
• Rohs Compliant: Yes
• Processor Series: HC08JL
• Core: HC08
• Data Bus Width: 8 bit
• Data Ram Size: 512 B
• Interface Type: SCI
• Maximum Clock Frequency: 16 MHz
• Number Of Programmable I/os: 26
• Number Of Timers: 4
• Operating Supply Voltage: 2.7 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: Through Hole
• Development Tools By Supplier: FSICEBASE, DEMO908JL16E, M68CBL05CE
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 13 Channel
• For Use With: DEMO908JL16E - BOARD DEMO FOR MC908JL16
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

Freescale Semiconductor
1. One-time writable register after each reset.
2. LVIT1 and LVIT0 reset to 0 by a power-on reset (POR) only.
$001C
$001D
$001B
$001E
$001F
$0020
$0021
$0022
$0023
$0024
$0025
Addr.
TIM Counter Modulo Register
TIM1 Counter Register High
TIM1 Channel 0 Status and
Keyboard Interrupt Enable
Control Register (T1SC0)
Configuration Register 2
Configuration Register 1
TIM1 Status and Control
Register Low (T1MODL)
IRQ Status and Control
TIM1 Counter Register
Register Name
TIM1 Counter Modulo
Register (INTSCR)
Register (KBIER)
Register (T1SC)
Unimplemented
High (TMODH)
U = Unaffected
Low (T1CNTL)
(CONFIG2)
(CONFIG1)
Figure 2-2. Control, Status, and Data Registers (Sheet 3 of 7)
(T1CNTH)
(1)
(1)
Reset:
Reset:
Reset:
Reset:
Reset:
Reset:
Reset:
Reset:
Reset:
Reset:
Read:
Read:
Read:
Read:
Read:
Read:
Read:
Read:
Read:
Read:
Write:
Write:
Write:
Write:
Write:
Write:
Write:
Write:
Write:
Write:
X = Indeterminate
IRQPUD
COPRS
KBIE7
Bit 15
CH0F
Bit 15
Bit 7
MC68HC908JL16 Data Sheet, Rev. 1.1
TOF
Bit 7
Bit 7
0
0
0
0
0
0
0
0
0
1
1
0
0
CH0IE
KBIE6
Bit 14
Bit 14
TOIE
Bit 6
Bit 6
R
R
6
0
0
0
0
0
0
0
0
1
1
0
TSTOP
KBIE5
MS0B
Bit 13
Bit 13
Bit 5
Bit 5
R
R
5
0
0
0
0
0
1
0
0
1
1
0
= Unimplemented
KBIE4
LVIT1
MS0A
TRST
Bit 12
Bit 12
LVID
Bit 4
Bit 4
0
4
0
0
0
(2)
0
0
0
0
0
1
1
0
ELS0B
KBIE3
LVIT0
Bit 11
Bit 11
IRQF
Bit 3
Bit 3
0
R
3
0
0
0
0
0
0
0
1
1
0
(2)
SSREC
ELS0A
KBIE2
Bit 10
Bit 10
ACK
Bit 2
Bit 2
PS2
R
R
2
0
0
0
0
0
0
0
0
1
1
0
= Reserved
IMASK
IICSEL
KBIE1
STOP
TOV0
Bit 9
Bit 1
Bit 9
Bit 1
PS1
1
0
0
0
0
0
0
0
1
1
0
I/O Section
CH0MAX
ICLKDIS
STOP_
MODE
KBIE0
COPD
Bit 0
Bit 8
Bit 0
Bit 8
Bit 0
PS0
0
0
0
0
0
0
0
1
1
0
27