MC9S08EL16CTJ Freescale Semiconductor, MC9S08EL16CTJ Datasheet - Page 107

• Manufacturer Part Number: MC9S08EL16CTJ
• Description: MCU 16KB FLASH SLIC 20TSSOP
• Manufacturer: Freescale Semiconductor
• Series: HCS08r

Specifications of MC9S08EL16CTJ

• Core Processor: HCS08
• Core Size: 8-Bit
• Speed: 40MHz
• Connectivity: I²C, LIN, SCI, SPI
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 16
• Program Memory Size: 16KB (16K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 512 x 8
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 12x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 20-TSSOP
• Processor Series: S08EL
• Core: HCS08
• Data Bus Width: 8 bit
• Data Ram Size: 1 KB
• Interface Type: SCI, SPI, I2C, SLIC
• Maximum Clock Frequency: 200 KHz
• Number Of Programmable I/os: 16
• Number Of Timers: 2
• Operating Supply Voltage: 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWS08
• Development Tools By Supplier: DEMO9S08EL32AUTO, DEMO9S08EL32
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 12 Channel
• For Use With: DEMO9S08EL32 - BOARD DEMO FOR 9S08 EL MCUDEMO9S08EL32AUTO - DEMO BOARD EL32 AUTO
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Freescale Semiconductor
DIV
EOR #opr8i
EOR opr8a
EOR opr16a
EOR oprx16,X
EOR oprx8,X
EOR ,X
EOR oprx16,SP
EOR oprx8,SP
INC opr8a
INCA
INCX
INC oprx8,X
INC ,X
INC oprx8,SP
JMP opr8a
JMP opr16a
JMP oprx16,X
JMP oprx8,X
JMP ,X
JSR opr8a
JSR opr16a
JSR oprx16,X
JSR oprx8,X
JSR ,X
LDA #opr8i
LDA opr8a
LDA opr16a
LDA oprx16,X
LDA oprx8,X
LDA ,X
LDA oprx16,SP
LDA oprx8,SP
LDHX #opr16i
LDHX opr8a
LDHX opr16a
LDHX ,X
LDHX oprx16,X
LDHX oprx8,X
LDHX oprx8,SP
LDX #opr8i
LDX opr8a
LDX opr16a
LDX oprx16,X
LDX oprx8,X
LDX ,X
LDX oprx16,SP
LDX oprx8,SP
Source
Form
A ← (H:A)÷(X); H ← Remainder
Exclusive OR Memory with Accumulator
A ← (A ⊕ M)
Increment
Jump
PC ← Jump Address
Jump to Subroutine
PC ← (PC) + n (n = 1, 2, or 3)
Push (PCL); SP ← (SP) – $0001
Push (PCH); SP ← (SP) – $0001
PC ← Unconditional Address
Load Accumulator from Memory
A ← (M)
Load Index Register (H:X)
H:X ← (M:M + $0001)
Load X (Index Register Low) from Memory
X ← (M)
Divide
MC9S08EL32 Series and MC9S08SL16 Series Data Sheet, Rev. 3
M ← (M) + $01
A ← (A) + $01
X ← (X) + $01
M ← (M) + $01
M ← (M) + $01
M ← (M) + $01
Table 7-2. Instruction Set Summary (Sheet 5 of 9)
Operation
INH
IMM
DIR
EXT
IX2
IX1
IX
SP2
SP1
DIR
INH
INH
IX1
IX
SP1
DIR
EXT
IX2
IX1
IX
DIR
EXT
IX2
IX1
IX
IMM
DIR
EXT
IX2
IX1
IX
SP2
SP1
IMM
DIR
EXT
IX
IX2
IX1
SP1
IMM
DIR
EXT
IX2
IX1
IX
SP2
SP1
Object Code
9E D8
9E E8
9E 6C
9E D6
9E E6
9E AE
9E BE
9E CE
9E FE
9E DE
9E EE
52
A8
B8
C8
D8
E8
F8
3C
4C
5C
6C
7C
BC
CC
DC
EC
FC
BD
CD
DD
ED
FD
A6
B6
C6
D6
E6
F6
45
55
32
AE
BE
CE
DE
EE
FE
ii
dd
hh ll
ee ff
ff
ee ff
ff
dd
ff
ff
dd
hh ll
ee ff
ff
dd
hh ll
ee ff
ff
ii
dd
hh ll
ee ff
ff
ee ff
ff
jj kk
dd
hh ll
ee ff
ff
ff
ii
dd
hh ll
ee ff
ff
ee ff
ff
Chapter 7 Central Processor Unit (S08CPUV3)
6
2
3
4
4
3
3
5
4
5
1
1
5
4
6
3
4
4
3
3
5
6
6
5
5
2
3
4
4
3
3
5
4
3
4
5
5
6
5
5
2
3
4
4
3
3
5
4
fffffp
pp
rpp
prpp
prpp
rpp
rfp
pprpp
prpp
rfwpp
p
p
rfwpp
rfwp
prfwpp
ppp
pppp
pppp
ppp
ppp
ssppp
pssppp
pssppp
ssppp
ssppp
pp
rpp
prpp
prpp
rpp
rfp
pprpp
prpp
ppp
rrpp
prrpp
prrfp
pprrpp
prrpp
prrpp
pp
rpp
prpp
prpp
rpp
rfp
pprpp
prpp
Cyc-by-Cyc
Details
V 1 1 H I N Z C
– 1 1 – – –
0 1 1 – –
– 1 1 – – – – –
– 1 1 – – – – –
0 1 1 – –
0 1 1 – –
0 1 1 – –
1 1 – –
on CCR
Affect
107
–
–
–
–
–