M3087BFKBGP#U3 Renesas Electronics America, M3087BFKBGP#U3 Datasheet - Page 355
M3087BFKBGP#U3
Manufacturer Part Number
M3087BFKBGP#U3
Description
IC M32C/87B MCU FLASH 144LQFP
Manufacturer
Renesas Electronics America
Series
M16C™ M32C/80r
Datasheet
1.M3087BFLGPU3.pdf
(629 pages)
Specifications of M3087BFKBGP#U3
Core Processor
M32C/80
Core Size
16/32-Bit
Speed
32MHz
Connectivity
EBI/EMI, I²C, IEBus, IrDA, SIO, UART/USART
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
121
Program Memory Size
768KB (768K x 8)
Program Memory Type
FLASH
Ram Size
48K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 34x10b, D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
144-LQFP
For Use With
R0K330879S001BE - KIT DEV RSK M32C/87R0K330879S000BE - KIT DEV RSK M32C/87
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
M3087BFKBGP#U3M3087BFKBGP#U5
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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M32C/87 Group (M32C/87, M32C/87A, M32C/87B)
REJ09B0180-0151 Rev.1.51 Jul 31, 2008
Page 331 of 587
Figure 22.10
Group 2 Base Timer Control Register 1
b7
b6 b5 b4
0
NOTES:
0
1. The base timer is reset at the second fBT1 clock cycle after the base timer matches the G2PO0 register.
2. The PRP bit is enabled when the RTP bit in the G2POCRi register is set to 1 (real-time port function used).
3. Use the BTSR register when multiple base timers start counting simultaneously. In this case, set the BTS bit to 0.
b3
0
G2BCR1 Register
b2
b1
b0
Bit Symbol
(b6-b5)
RST0
RST1
RST2
PRP
BTS
(b3)
Symbol
G2BCR1
−
−
Base timer start bit
select bit
Base timer reset source
select bit 0
Base timer reset source
select bit 1
Base timer reset source
select bit 2
Reserved bit
Reserved bits
Parallel real-time port function
(2)
Bit Name
(3)
Address
0163h
0: Base timer is not reset by a reset request from
1: Base timer is reset by a reset request from
0: Base timer is not reset when the base timer in
1: Base timer is reset when the base timer in
0: Base timer is not reset by matching
1: Base timer is reset by matching
Set to 0
0: Base timer reset
1: Base timer count starts
Set to 0
0: Real-time port output mode
1: Parallel read-time port output mode
group 1 is reset.
group 1 is reset.
the G2PO0 register
the G2PO0 register
the communication function
the communication function
Function
(1)
After Reset
00h
22. Intelligent I/O
RW
RW
RW
RW
RW
RW
RW
RW
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