MCIMX515CJM6C Freescale Semiconductor, MCIMX515CJM6C Datasheet - Page 90

• Manufacturer Part Number: MCIMX515CJM6C
• Description: MULTIMEDIA PROC 529-LFBGA
• Manufacturer: Freescale Semiconductor
• Series: i.MX51r

Specifications of MCIMX515CJM6C

• Core Processor: ARM Cortex-A8
• Core Size: 32-Bit
• Speed: 600MHz
• Connectivity: 1-Wire, EBI/EMI, Ethernet, I²C, IrDA, MMC, SPI, SSI, UART/USART, USB OTG
• Peripherals: DMA, I²S, LCD, POR, PWM, WDT
• Number Of I /o: 128
• Program Memory Type: ROMless
• Ram Size: 128K x 8
• Voltage - Supply (vcc/vdd): 0.8 V ~ 1.15 V
• Oscillator Type: External
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 529-LFBGA
• Processor Series: i.MX51
• Core: ARM Cortex A8
• Data Bus Width: 32 bit
• Program Memory Size: 36 KB
• Data Ram Size: 128 KB
• Interface Type: I2C, SPI, SSI, UART, USB
• Maximum Clock Frequency: 200 MHz
• Number Of Timers: 5
• Operating Supply Voltage: 0.8 V to 1.15 V
• Maximum Operating Temperature: + 95 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2
• Development Tools By Supplier: MCIMX51EVKJ
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Electrical Characteristics
internal events—local start points. The timing diagrams correspond to inverse polarity of the
IPP_DISP_CLK signal and active-low polarity of the HSYNC, VSYNC and DRDY signals.
IPP_DISP_CLK
Figure 54
programmable.
90
IPP_DATA
DI clock
HSYNC
VSYNC
DRDY
IP5o
depicts the vertical timing (timing of one frame). All parameters shown in the figure are
HSYNC
VSYNC
DRDY
IP13o
i.MX51 Applications Processors for Consumer and Industrial Products, Rev. 4
IP11
Figure 53. TFT Panels Timing Diagram—Horizontal Sync Pulse
Figure 54. TFT Panels Timing Diagram—Vertical Sync Pulse
IP13
IP14
IP8o
IP9
IP8
IP9o
Start of frame
IP12
IP6
D0
IP5
IP7
End of frame
D1
Freescale Semiconductor
Dn
IP15
IP10