PIC16F636-E/ST Microchip Technology, PIC16F636-E/ST Datasheet - Page 125

• Manufacturer Part Number: PIC16F636-E/ST
• Description: IC MCU FLASH 2KX14 14TSSOP
• Manufacturer: Microchip Technology
• Series: PIC® 16Fr

Specifications of PIC16F636-E/ST

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 20MHz
• Peripherals: Brown-out Detect/Reset, LVD, POR, WDT
• Number Of I /o: 11
• Program Memory Size: 3.5KB (2K x 14)
• Program Memory Type: FLASH
• Ram Size: 128 x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 5.5 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 14-TSSOP
• For Use With: AC162057 - MPLAB ICD 2 HEADER 14DIP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Data Converters: -
• Connectivity: -

TABLE 11-6:
REGISTER 11-1:
© 2007 Microchip Technology Inc.
Configuration Register 0
Configuration Register 1
Configuration Register 2
Configuration Register 3
Configuration Register 4
Configuration Register 5
Column Parity Register 6
AFE Status Register 7
bit 8
Legend:
R = Readable bit
-n = Value at POR
bit 8-7
bit 6-5
bit 4
bit 3
bit 2
bit 1
bit 0
R/W-0
OEH1
Register Name
OEH<1:0>: Output Enable Filter High Time (T
00 = Output Enable Filter disabled (no wake-up sequence required, passes all signal to LFDATA)
01 = 1 ms
10 = 2 ms
11 = 4 ms
OEL<1:0>: Output Enable Filter Low Time (T
00 = 1 ms
01 = 1 ms
10 = 2 ms
11 = 4 ms
ALRTIND: ALERT bit, output triggered by:
1 = Parity error and/or expired Alarm timer (receiving noise, see Section 11.14.3 “Alarm Timer”)
0 = Parity error
LCZEN: LCZ Enable bit
1 = Disabled
0 = Enabled
LCYEN: LCY Enable bit
1 = Disabled
0 = Enabled
LCXEN: LCX Enable bit
1 = Disabled
0 = Enabled
R0PAR: Register Parity bit – set/cleared so the 9-bit register contains odd parity – an odd number of set bits
R/W-0
OEH0
ANALOG FRONT-END CONFIGURATION REGISTERS SUMMARY
Address
CONFIGURATION REGISTER 0
0010
0100
0000
0001
0011
0101
0110
0111
W = Writable bit
‘1’ = Bit is set
R/W-0
OEL1
AUTOCHSEL
RSSIFET
Bit 8
Unimplemented
Active Channel Indicators
DATOUT
OEH
Channel X Sensitivity Control
R/W-0
OEL0
AGCSIG
CLKDIV
Bit 7
PIC12F635/PIC16F636/639
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
MODMIN
OEL
OEH
ALRTIND
Bit 6
R/W-0
) bit
) bit
OEL
Column Parity Bits
MODMIN
AGCACT
Bit 5
LCZEN
Channel X Tuning Capacitor
Channel Y Tuning Capacitor
Channel Z Tuning Capacitor
R/W-0
ALRTIND
Wake-up Channel Indicators
Bit 4
Channel Y Sensitivity Control
Channel Z Sensitivity Control
x = Bit is unknown
LCYEN
R/W-0
LCZEN
Bit 3
LCYEN
Bit 2
LCXEN
R/W-0
DS41232D-page 123
LCXEN
ALARM
Bit 1
R0PAR
R/W-0
R0PAR
R1PAR
R2PAR
R3PAR
R4PAR
R5PAR
R6PAR
Bit 0
PEI
bit 0