ATMEGA48V-10MMU Atmel, ATMEGA48V-10MMU Datasheet - Page 311

• Manufacturer Part Number: ATMEGA48V-10MMU
• Description: MCU AVR 4K FLASH 10MHZ 28-QFN
• Manufacturer: Atmel
• Series: AVR® ATmegar

Specifications of ATMEGA48V-10MMU

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 10MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 23
• Program Memory Size: 4KB (2K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 256 x 8
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 28-VQFN Exposed Pad, 28-HVQFN, 28-SQFN, 28-DHVQFN
• Processor Series: ATMEGA48x
• Core: AVR8
• Data Bus Width: 8 bit
• Data Ram Size: 512 B
• Interface Type: 2-Wire, SPI, USART, Serial
• Maximum Clock Frequency: 10 MHz
• Number Of Programmable I/os: 23
• Number Of Timers: 3
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWAVR, EWAVR-BL
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 8 Channel
• Package: 28MLF EP
• Device Core: AVR
• Family Name: ATmega
• Maximum Speed: 10 MHz
• Operating Supply Voltage: 2.5|3.3|5 V
• For Use With: ATSTK600 - DEV KIT FOR AVR/AVR32ATAVRDRAGON - KIT DRAGON 32KB FLASH MEM AVR
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

28.9
2545S–AVR–07/10
Parallel Programming Characteristics
Figure 28-7. Parallel Programming Timing, Including some General Timing Requirements
Figure 28-8. Parallel Programming Timing, Loading Sequence with Timing Requirements
Note:
PAGEL
XTAL1
(DATA, XA0/1, BS1, BS2)
DATA
BS1
XA0
XA1
1. The timing requirements shown in
loading operation.
Data & Contol
RDY/BSY
ADDR0 (Low Byte)
LOAD ADDRESS
PAGEL
XTAL1
(LOW BYTE)
WR
t
t
BVPH
DVXH
LOAD DATA
(LOW BYTE)
DATA (Low Byte)
t
t
XHXL
PHPL
Figure 28-7
t
t
t
t
t
XLXH
XLDX
XLWL
PLBX
PLWL
t
(that is, t
BVWL
(HIGH BYTE)
LOAD DATA
DATA (High Byte)
t
WLWH
DVXH
t
XLPH
ATmega48/88/168
WLRL
LOAD DATA
, t
XHXL
t
PLXH
, and t
t
WLBX
LOAD ADDRESS
XLDX
(LOW BYTE)
ADDR1 (Low Byte)
) also apply to
t
WLRH
(1)
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