PIC12CE674-10I/P Microchip Technology, PIC12CE674-10I/P Datasheet - Page 150
![no-image](/images/manufacturer_photos/0/4/439/microchip_technology_sml.jpg)
PIC12CE674-10I/P
Manufacturer Part Number
PIC12CE674-10I/P
Description
IC MCU OTP 2KX14 A/D&EE 8DIP
Manufacturer
Microchip Technology
Series
PIC® 12Cr
Datasheets
1.PIC16F688T-ISL.pdf
(688 pages)
2.PIC12CE673-10P.pdf
(129 pages)
3.PIC12CE673-10P.pdf
(3 pages)
4.PIC12CE673-10P.pdf
(14 pages)
5.PIC12CE673-10P.pdf
(12 pages)
Specifications of PIC12CE674-10I/P
Core Processor
PIC
Core Size
8-Bit
Speed
10MHz
Peripherals
POR, WDT
Number Of I /o
5
Program Memory Size
3.5KB (2K x 14)
Program Memory Type
OTP
Eeprom Size
16 x 8
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 4x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
8-DIP (0.300", 7.62mm)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Connectivity
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC12CE674-10I/P
Manufacturer:
MICROCHIP
Quantity:
12 000
- PIC16F688T-ISL PDF datasheet
- PIC12CE673-10P PDF datasheet #2
- PIC12CE673-10P PDF datasheet #3
- PIC12CE673-10P PDF datasheet #4
- PIC12CE673-10P PDF datasheet #5
- Current page: 150 of 688
- Download datasheet (3Mb)
PICmicro MID-RANGE MCU FAMILY
9.6
DS31009A-page 9-10
PORTE and the TRISE Register
PORTE can be up to an 8-bit port with Schmitt Trigger input buffers. Each pin is individually con-
figurable as an input or output.
Example 9-5: Initializing PORTE
Figure 9-8: Typical PORTE Block Diagram (in I/O Port Mode)
Data Bus
WR PORT
WR TRIS
RD PORT
Note: I/O pins have protection diodes to V
Note:
CLRF
CLRF
BSF
MOVLW
MOVWF
On some devices with PORTE, the upper bits of the TRISE register are used for the
Parallel Slave Port control and status bits.
STATUS
PORTE
STATUS, RP0
0x03
TRISE
TRIS Latch
Data Latch
D
D
CK
CK
; Bank0
; Initialize PORTE by clearing output
;
; Select Bank1
; Value used to initialize data direction
; PORTE<1:0> = inputs, PORTE<7:2> = outputs
Q
Q
Q
Q
RD TRIS
data latches
DD
and V
SS
.
Q
EN
D
1997 Microchip Technology Inc.
Schmitt
Trigger
input
buffer
I/O pin
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