AT91SAM7S161-AU Atmel, AT91SAM7S161-AU Datasheet - Page 291
![IC MCU ARM7 16KB FLASH 64LQFP](/photos/12/13/121332/313-64-tqfp_sml.jpg)
AT91SAM7S161-AU
Manufacturer Part Number
AT91SAM7S161-AU
Description
IC MCU ARM7 16KB FLASH 64LQFP
Manufacturer
Atmel
Series
AT91SAMr
Specifications of AT91SAM7S161-AU
Core Processor
ARM7
Core Size
16/32-Bit
Speed
55MHz
Connectivity
I²C, SPI, SSC, UART/USART, USB
Peripherals
Brown-out Detect/Reset, DMA, POR, PWM, WDT
Number Of I /o
32
Program Memory Size
16KB (16K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
1.65 V ~ 1.95 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-LQFP
For Use With
AT91SAM-ICE - EMULATOR FOR AT91 ARM7/ARM9AT91SAM7S-EK - KIT EVAL FOR ARM AT91SAM7S
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
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Manufacturer
Quantity
Price
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29. Two-wire Interface (TWI) AT91SAM7S512/256/128/64/321/32
29.1
29.2
6175K–ATARM–30-Aug-10
Overview
List of Abbreviations
N O T E : T h i s d e f i n i t i o n o f t h e T W I d o e s n o t p e r t a i n t o A T 9 1 S A M 7 S 1 6 / 1 6 1 . F o r
AT91SAM7S16/161, see
The Two-wire Interface (TWI) interconnects components on a unique two-wire bus, made up of
one clock line and one data line with speeds of up to 400 Kbits per second, based on a byte-ori-
ented transfer format. It can be used with any Atmel Two-wire Interface bus Serial EEPROM and
I²C compatible device such as Real Time Clock (RTC), Dot Matrix/Graphic LCD Controllers and
Temperature Sensor, to name but a few. The TWI is programmable as master transmitter or
master receiver with sequential or single-byte access. A configurable baud rate generator per-
mits the output data rate to be adapted to a wide range of core clock frequencies. Below,
29-1
Table 29-1.
Notes:
Table 29-2.
I2C Standard
Standard Mode Speed (100 KHz)
Fast Mode Speed (400 KHz)
7 or 10 bits Slave Addressing
START BYTE
Repeated Start (Sr) Condition
ACK and NACK Management
Slope control and input filtering (Fast mode)
Clock stretching
Abbreviation
TWI
A
N
P
S
Sr
DADR
IADR
R
W
lists the compatibility level of the Atmel Two-wire Interface and a full I2C compatible device.
1. START + b000000001 + Ack + Sr
2. A repeated start condition is only supported in Master Receiver mode. See
“Internal Address” on page 297
(1)
Atmel TWI compatibility with i2C Standard
Abbreviations
Section 30.
Description
Two-wire Interface
Acknowledge
Not Acknowledge
Stop
Start
Repeated Start
Device Address
Internal Address
Read
Write
AT91SAM7S Series Preliminary
Atmel TWI
Supported
Supported
Supported
Not Supported
Not Fully Supported
Supported
Not Supported
Supported
(2)
Section 29.6.5
Table
291
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