PIC16C55-XTI/SS Microchip Technology, PIC16C55-XTI/SS Datasheet - Page 41

• Manufacturer Part Number: PIC16C55-XTI/SS
• Description: IC MCU OTP 512X12 28SSOP
• Manufacturer: Microchip Technology
• Series: PIC® 16Cr

Specifications of PIC16C55-XTI/SS

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 4MHz
• Peripherals: POR, WDT
• Number Of I /o: 20
• Program Memory Size: 768B (512 x 12)
• Program Memory Type: OTP
• Ram Size: 24 x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 6.25 V
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 28-SSOP
• For Use With: 309-1026 - ADAPTER 28-SSOP TO 28-DIP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Data Converters: -
• Connectivity: -

8.1
When an external clock input is used for Timer0, it must
meet certain requirements. The external clock require-
ment is due to internal phase clock (T
tion. Also, there is a delay in the actual incrementing of
Timer0 after synchronization.
8.1.1
When no prescaler is used, the external clock input is
the same as the prescaler output. The synchronization
of T0CKI with the internal phase clocks is accom-
plished by sampling the prescaler output on the Q2 and
Q4 cycles of the internal phase clocks (Figure 8-5).
Therefore, it is necessary for T0CKI to be high for at
least 2T
at least 2T
to the electrical specification of the desired device.
FIGURE 8-5:
Note 1: External clock if no prescaler selected, prescaler output otherwise.
2002 Microchip Technology Inc.
OSC
2: The arrows indicate the points in time where sampling occurs.
3: Delay from clock input change to Timer0 increment is 3Tosc to 7Tosc (duration of Q = Tosc). Therefore,
Using Timer0 with an External
Clock
OSC
EXTERNAL CLOCK
SYNCHRONIZATION
External Clock/Prescaler
Output After Sampling
(and a small RC delay of 20 ns) and low for
the error in measuring the interval between two edges on Timer0 input =
Increment Timer0 (Q4)
External Clock Input or
Prescaler Output (1)
(and a small RC delay of 20 ns). Refer
TIMER0 TIMING WITH EXTERNAL CLOCK
Timer0
OSC
(2)
Q1 Q2 Q3 Q4
) synchroniza-
(3)
Preliminary
Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4
T0
When a prescaler is used, the external clock input is
divided by the asynchronous ripple counter-type pres-
caler so that the prescaler output is symmetrical. For
the external clock to meet the sampling requirement,
the ripple counter must be taken into account. There-
fore, it is necessary for T0CKI to have a period of at
least 4T
the prescaler value. The only requirement on T0CKI
high and low time is that they do not violate the mini-
mum pulse width requirement of 10 ns. Refer to param-
eters 40, 41 and 42 in the electrical specification of the
desired device.
8.1.2
Since the prescaler output is synchronized with the
internal clocks, there is a small delay from the time the
external clock edge occurs to the time the Timer0 mod-
ule is actually incremented. Figure 8-5 shows the delay
from the external clock edge to the timer incrementing.
OSC
TIMER0 INCREMENT DELAY
(and a small RC delay of 40 ns) divided by
T0 + 1
4Tosc max.
PIC16C5X
T0 + 2
Small pulse
misses sampling
DS30453D-page 39