ATMEGA169P-16MCH Atmel, ATMEGA169P-16MCH Datasheet - Page 129

• Manufacturer Part Number: ATMEGA169P-16MCH
• Description: MCU AVR 16KB FLASH 16MHZ 64-VQFN
• Manufacturer: Atmel
• Series: AVR® ATmegar

Specifications of ATMEGA169P-16MCH

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 16MHz
• Connectivity: SPI, UART/USART, USI
• Peripherals: Brown-out Detect/Reset, LCD, POR, PWM, WDT
• Number Of I /o: 54
• Program Memory Size: 16KB (8K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 512 x 8
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-VQFN Exposed Pad, 64-HVQFN, 64-SQFN, 64-DHVQFN
• For Use With: ATSTK600 - DEV KIT FOR AVR/AVR32ATAVRBFLY - KIT EVALUATION AVR BUTTERFLYATSTK502 - MOD EXPANSION AVR STARTER 500ATSTK500 - PROGRAMMER AVR STARTER KIT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

8018P–AVR–08/10
Table 15-3
correct or the phase and frequency correct, PWM mode.
Table 15-3.
Note:
• Bit 1:0 – WGM11:0: Waveform Generation Mode
Combined with the WGM13:2 bits found in the TCCR1B Register, these bits control the counting
sequence of the counter, the source for maximum (TOP) counter value, and what type of wave-
form generation to be used, see
Timer/Counter unit are: Normal mode (counter), Clear Timer on Compare match (CTC) mode,
and three types of Pulse Width Modulation (PWM) modes.
118.)
COM1A1/COM1B1
1. A special case occurs when OCR1A/OCR1B equals TOP and COM1A1/COM1B1 is set.
0
0
1
1
”Phase Correct PWM Mode” on page 122.
shows the COM1x1:0 bit functionality when the WGM13:0 bits are set to the phase
Compare Output Mode, Phase Correct and Phase and Frequency Correct
PWM
(1)
COM1A0/COM1B0
0
1
0
1
Table 15-4 on page
Description
Normal port operation, OC1A/OC1B disconnected.
WGM13:0 = 9 or 11: Toggle OC1A on Compare
Match, OC1B disconnected (normal port operation).
For all other WGM1 settings, normal port operation,
OC1A/OC1B disconnected.
Clear OC1A/OC1B on Compare Match when up-
counting. Set OC1A/OC1B on Compare Match when
down counting.
Set OC1A/OC1B on Compare Match when up-
counting. Clear OC1A/OC1B on Compare Match
when down counting.
for more details.
130. Modes of operation supported by the
(See ”Modes of Operation” on page
ATmega169P
See
129