ATMEGA644PA-AUR Atmel, ATMEGA644PA-AUR Datasheet - Page 13
ATMEGA644PA-AUR
Manufacturer Part Number
ATMEGA644PA-AUR
Description
IC MCU AVR 64K FLASH 44TQFP
Manufacturer
Atmel
Series
AVR® ATmegar
Specifications of ATMEGA644PA-AUR
Core Processor
AVR
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
32
Program Memory Size
64KB (32K x 16)
Program Memory Type
FLASH
Eeprom Size
2K x 8
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
44-TQFP, 44-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
ATMEGA644PA-AUR
Manufacturer:
ATMEL
Quantity:
1 400
Part Number:
ATMEGA644PA-AUR
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
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6.4
8272A–AVR–01/10
General Purpose Register File
The Register File is optimized for the AVR Enhanced RISC instruction set. In order to achieve
the required performance and flexibility, the following input/output schemes are supported by the
Register File:
• One 8-bit output operand and one 8-bit result input
• Two 8-bit output operands and one 8-bit result input
• Two 8-bit output operands and one 16-bit result input
• One 16-bit output operand and one 16-bit result input
Figure 6-2
Figure 6-2.
Most of the instructions operating on the Register File have direct access to all registers, and
most of them are single cycle instructions.
As shown in
directly into the first 32 locations of the user Data Space. Although not being physically imple-
mented as SRAM locations, this memory organization provides great flexibility in access of the
registers, as the X-, Y- and Z-pointer registers can be set to index any register in the file.
164A/164PA/324A/324PA/644A/644PA/1284/1284P
Registers
Purpose
shows the structure of the 32 general purpose working registers in the CPU.
General
Working
Figure
AVR CPU General Purpose Working Registers
6-2, each register is also assigned a data memory address, mapping them
7
R13
R14
R15
R16
R17
R26
R27
R28
R29
R30
R31
R0
R1
R2
…
…
0
Addr.
0x0D
0x1C
0x1D
0x00
0x01
0x02
0x0E
0x0F
0x10
0x11
0x1A
0x1B
0x1E
0x1F
X-register High Byte
Y-register High Byte
Z-register High Byte
X-register Low Byte
Y-register Low Byte
Z-register Low Byte
13
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