PIC18LF27J53-I/SO Microchip Technology, PIC18LF27J53-I/SO Datasheet - Page 165
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PIC18LF27J53-I/SO
Manufacturer Part Number
PIC18LF27J53-I/SO
Description
IC PIC MCU 128KB FLASH 28SOIC
Manufacturer
Microchip Technology
Series
PIC® XLP™ 18Fr
Datasheets
1.PIC18LF24J10-ISS.pdf
(32 pages)
2.PIC18F26J13-ISS.pdf
(496 pages)
3.PIC18F26J53-ISS.pdf
(586 pages)
4.PIC18F26J53-ISS.pdf
(12 pages)
Specifications of PIC18LF27J53-I/SO
Core Size
8-Bit
Program Memory Size
128KB (64K x 16)
Core Processor
PIC
Speed
48MHz
Connectivity
I²C, LIN, SPI, UART/USART, USB
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
22
Program Memory Type
FLASH
Ram Size
3.8K x 8
Voltage - Supply (vcc/vdd)
2 V ~ 2.75 V
Data Converters
A/D 10x10b/12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Controller Family/series
PIC18
Cpu Speed
48MHz
Digital Ic Case Style
SOIC
Supply Voltage Range
1.8V To 3.6V
Embedded Interface Type
I2C, SPI, USART
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
- PIC18LF24J10-ISS PDF datasheet
- PIC18F26J13-ISS PDF datasheet #2
- PIC18F26J53-ISS PDF datasheet #3
- PIC18F26J53-ISS PDF datasheet #4
- Current page: 165 of 586
- Download datasheet (6Mb)
10.7.6
The PIC18F47J53 family of devices implements a total
of 37 registers for remappable peripheral configuration
of 44-pin devices. The 28-pin devices have 31 registers
for remappable peripheral configuration.
REGISTER 10-5:
REGISTER 10-6:
REGISTER 10-7:
2010 Microchip Technology Inc.
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7-1
bit 0
Note 1:
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7-5
bit 4-0
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7-5
bit 4-0
U-0
U-0
U-0
—
—
—
Register values can only be changed if IOLOCK (PPSCON<0>) = 0.
PERIPHERAL PIN SELECT
REGISTERS
Unimplemented: Read as ‘0’
IOLOCK: I/O Lock Enable bit
1 = I/O lock is active, RPORx and RPINRx registers are write-protected
0 = I/O lock is not active, pin configurations can be changed
Unimplemented: Read as ‘0’
INTR1R<4:0>: Assign External Interrupt 1 (INT1) to the Corresponding RPn Pin bits
Unimplemented: Read as ‘0’
INTR2R<4:0>: Assign External Interrupt 2 (INT2) to the Corresponding RPn Pin bits
U-0
U-0
U-0
—
—
—
PPSCON: PERIPHERAL PIN SELECT INPUT REGISTER 0 (BANKED PPSCON)
RPINR1: PERIPHERAL PIN SELECT INPUT REGISTER 1 (BANKED EE1h)
RPINR2: PERIPHERAL PIN SELECT INPUT REGISTER 2 (BANKED EE2h)
W = Writable bit
‘1’ = Bit is set
R/W = Readable bit, Writable bit if IOLOCK = 0
W = Writable bit
‘1’ = Bit is set
R/W = Readable bit, Writable bit if IOLOCK = 0
W = Writable bit
‘1’ = Bit is set
U-0
U-0
U-0
—
—
—
INTR1R4
INTR2R4
R/W-1
R/W-1
U-0
Preliminary
—
U = Unimplemented bit, read as ‘0’
U = Unimplemented bit, read as ‘0’
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
‘0’ = Bit is cleared
‘0’ = Bit is cleared
INTR1R3
INTR2R3
PIC18F47J53 FAMILY
R/W-1
R/W-1
U-0
—
Note:
Input and output register values can only be
changed if IOLOCK (PPSCON<0>) = 0.
See Example 10-7 for a specific command
sequence.
INTR1R2
INTR2R2
R/W-1
R/W-1
U-0
—
x = Bit is unknown
x = Bit is unknown
x = Bit is unknown
INTR1R1
INTR2R1
R/W-1
R/W-1
U-0
—
DS39964B-page 165
INTR1R0
INTR2R0
IOLOCK
R/W-0
R/W-1
R/W-1
bit 0
bit 0
bit 0
(1)
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