PIC18LF27J53-I/SO Microchip Technology, PIC18LF27J53-I/SO Datasheet - Page 408
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PIC18LF27J53-I/SO
Manufacturer Part Number
PIC18LF27J53-I/SO
Description
IC PIC MCU 128KB FLASH 28SOIC
Manufacturer
Microchip Technology
Series
PIC® XLP™ 18Fr
Datasheets
1.PIC18LF24J10-ISS.pdf
(32 pages)
2.PIC18F26J13-ISS.pdf
(496 pages)
3.PIC18F26J53-ISS.pdf
(586 pages)
4.PIC18F26J53-ISS.pdf
(12 pages)
Specifications of PIC18LF27J53-I/SO
Core Size
8-Bit
Program Memory Size
128KB (64K x 16)
Core Processor
PIC
Speed
48MHz
Connectivity
I²C, LIN, SPI, UART/USART, USB
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
22
Program Memory Type
FLASH
Ram Size
3.8K x 8
Voltage - Supply (vcc/vdd)
2 V ~ 2.75 V
Data Converters
A/D 10x10b/12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Controller Family/series
PIC18
Cpu Speed
48MHz
Digital Ic Case Style
SOIC
Supply Voltage Range
1.8V To 3.6V
Embedded Interface Type
I2C, SPI, USART
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
- PIC18LF24J10-ISS PDF datasheet
- PIC18F26J13-ISS PDF datasheet #2
- PIC18F26J53-ISS PDF datasheet #3
- PIC18F26J53-ISS PDF datasheet #4
- Current page: 408 of 586
- Download datasheet (6Mb)
PIC18F47J53 FAMILY
REGISTER 24-1:
DS39964B-page 408
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7
bit 6
bit 5
bit 4-3
bit 2
bit 1-0
Note 1:
R/W-0
CON
The CMxIF is automatically set any time this mode is selected and must be cleared by the application after
the initial configuration.
CON: Comparator Enable bit
1 = Comparator is enabled
0 = Comparator is disabled
COE: Comparator Output Enable bit
1 = Comparator output is present on the CxOUT pin (assigned in the PPS module)
0 = Comparator output is internal only
CPOL: Comparator Output Polarity Select bit
1 = Comparator output is inverted
0 = Comparator output is not inverted
EVPOL<1:0>: Interrupt Polarity Select bits
11 = Interrupt generation on any change of the output
10 = Interrupt generation only on high-to-low transition of the output
01 = Interrupt generation only on low-to-high transition of the output
00 = Interrupt generation is disabled
CREF: Comparator Reference Select bit (non-inverting input)
1 = Non-inverting input connects to the internal CV
0 = Non-inverting input connects to the CxINA pin
CCH<1:0>: Comparator Channel Select bits
11 = Inverting input of comparator connects to V
10 = Inverting input of comparator connects to the CxIND pin
01 = Inverting input of comparator connects to the CxINC pin
00 = Inverting input of comparator connects to the CxINB pin
R/W-0
COE
CMxCON: COMPARATOR CONTROL 1/2/3 REGISTER (1, ACCESS FD2h; 2, FD1h;
3, BANKED F25h)
W = Writable bit
‘1’ = Bit is set
R/W-0
CPOL
EVPOL1
R/W-1
Preliminary
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
EVPOL0
R/W-1
IRV
REF
(0.6V)
(1)
voltage
R/W-1
CREF
2010 Microchip Technology Inc.
x = Bit is unknown
R/W-1
CCH1
R/W-1
CCH0
bit 0
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