PIC24FJ256GB106T-I/PT Microchip Technology, PIC24FJ256GB106T-I/PT Datasheet - Page 113
![IC PIC MCU FLASH 256K 64-TQFP](/photos/6/81/68123/c04-066_pf_sml.jpg)
PIC24FJ256GB106T-I/PT
Manufacturer Part Number
PIC24FJ256GB106T-I/PT
Description
IC PIC MCU FLASH 256K 64-TQFP
Manufacturer
Microchip Technology
Series
PIC® 24Fr
Datasheets
1.PIC24FJ128GA106-IPT.pdf
(52 pages)
2.PIC24FJ64GB106-IPT.pdf
(16 pages)
3.PIC24FJ64GB106-IPT.pdf
(352 pages)
Specifications of PIC24FJ256GB106T-I/PT
Core Processor
PIC
Core Size
16-Bit
Speed
32MHz
Connectivity
I²C, SPI, UART/USART, USB OTG
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
51
Program Memory Size
256KB (85.5K x 24)
Program Memory Type
FLASH
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
2 V ~ 3.6 V
Data Converters
A/D 16x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-TFQFP
For Use With
DM240011 - KIT STARTER MPLAB FOR PIC24F MCUMA240014 - MODULE PLUG-IN PIC24
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Other names
PIC24FJ256GB106T-I/PTTR
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC24FJ256GB106T-I/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
- PIC24FJ128GA106-IPT PDF datasheet
- PIC24FJ64GB106-IPT PDF datasheet #2
- PIC24FJ64GB106-IPT PDF datasheet #3
- Current page: 113 of 352
- Download datasheet (3Mb)
REGISTER 7-33:
REGISTER 7-34:
2009 Microchip Technology Inc.
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 15-3
bit 2-0
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 15-7
bit 6-4
bit 3-0
U-0
U-0
U-0
U-0
—
—
—
—
Unimplemented: Read as ‘0’
LVDIP<2:0>: Low-Voltage Detect Interrupt Priority bits
111 = Interrupt is priority 7 (highest priority interrupt)
•
•
•
001 = Interrupt is priority 1
000 = Interrupt source is disabled
Unimplemented: Read as ‘0’
CTMUIP<2:0>: CTMU Interrupt Priority bits
111 = Interrupt is priority 7 (highest priority interrupt)
•
•
•
001 = Interrupt is priority 1
000 = Interrupt source is disabled
Unimplemented: Read as ‘0’
CTMUIP2
R/W-1
U-0
U-0
U-0
—
—
—
IPC18: INTERRUPT PRIORITY CONTROL REGISTER 18
IPC19: INTERRUPT PRIORITY CONTROL REGISTER 19
W = Writable bit
‘1’ = Bit is set
W = Writable bit
‘1’ = Bit is set
CTMUIP1
R/W-0
U-0
U-0
U-0
—
—
—
CTMUIP0
PIC24FJ256GB110 FAMILY
R/W-0
U-0
U-0
U-0
—
—
—
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
U-0
U-0
U-0
U-0
—
—
—
—
LVDIP2
R/W-1
U-0
U-0
U-0
—
—
—
x = Bit is unknown
x = Bit is unknown
LVDIP1
R/W-0
U-0
U-0
U-0
—
—
—
DS39897C-page 113
LVDIP0
R/W-0
U-0
U-0
U-0
—
—
—
bit 8
bit 0
bit 8
bit 0
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