PIC24FJ256GB106T-I/PT Microchip Technology, PIC24FJ256GB106T-I/PT Datasheet - Page 200
![IC PIC MCU FLASH 256K 64-TQFP](/photos/6/81/68123/c04-066_pf_sml.jpg)
PIC24FJ256GB106T-I/PT
Manufacturer Part Number
PIC24FJ256GB106T-I/PT
Description
IC PIC MCU FLASH 256K 64-TQFP
Manufacturer
Microchip Technology
Series
PIC® 24Fr
Datasheets
1.PIC24FJ128GA106-IPT.pdf
(52 pages)
2.PIC24FJ64GB106-IPT.pdf
(16 pages)
3.PIC24FJ64GB106-IPT.pdf
(352 pages)
Specifications of PIC24FJ256GB106T-I/PT
Core Processor
PIC
Core Size
16-Bit
Speed
32MHz
Connectivity
I²C, SPI, UART/USART, USB OTG
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
51
Program Memory Size
256KB (85.5K x 24)
Program Memory Type
FLASH
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
2 V ~ 3.6 V
Data Converters
A/D 16x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-TFQFP
For Use With
DM240011 - KIT STARTER MPLAB FOR PIC24F MCUMA240014 - MODULE PLUG-IN PIC24
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Other names
PIC24FJ256GB106T-I/PTTR
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC24FJ256GB106T-I/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
- PIC24FJ128GA106-IPT PDF datasheet
- PIC24FJ64GB106-IPT PDF datasheet #2
- PIC24FJ64GB106-IPT PDF datasheet #3
- Current page: 200 of 352
- Download datasheet (3Mb)
PIC24FJ256GB110 FAMILY
17.1
The UART module includes a dedicated 16-bit Baud
Rate Generator. The UxBRG register controls the
period of a free-running, 16-bit timer. Equation 17-1
shows the formula for computation of the baud rate
with BRGH = 0.
EQUATION 17-1:
Example 17-1 shows the calculation of the baud rate
error for the following conditions:
• F
• Desired Baud Rate = 9600
EXAMPLE 17-1:
DS39897C-page 200
Note 1:
Desired Baud Rate
Solving for UxBRG value:
Calculated Baud Rate= 4000000/(16 (25 + 1))
Error
Note 1:
CY
= 4 MHz
2:
UART Baud Rate Generator (BRG)
UxBRG
UxBRG
UxBRG
Baud Rate =
UxBRG =
F
frequency (F
Based on F
and PLL are disabled.
Based on F
CY
denotes the instruction cycle clock
UART BAUD RATE WITH
BRGH = 0
BAUD RATE ERROR CALCULATION (BRGH = 0)
= F
= ((F
= ((4000000/9600)/16) – 1
= 25
= 9615
= (Calculated Baud Rate – Desired Baud Rate)
= (9615 – 9600)/9600
= 0.16%
16 • (UxBRG + 1)
CY
16 • Baud Rate
OSC
CY
Desired Baud Rate
CY
= F
CY
= F
/2).
/(16 (UxBRG + 1))
F
F
CY
OSC
/Desired Baud Rate)/16) – 1
CY
OSC
(1,2)
/2, Doze mode
/2, Doze mode and PLL are disabled.
– 1
The maximum baud rate (BRGH = 0) possible is
F
possible is F
Equation 17-2 shows the formula for computation of
the baud rate with BRGH = 1.
EQUATION 17-2:
The maximum baud rate (BRGH = 1) possible is F
(for UxBRG = 0) and the minimum baud rate possible
is F
Writing a new value to the UxBRG register causes the
BRG timer to be reset (cleared). This ensures the BRG
does not wait for a timer overflow before generating the
new baud rate.
CY
Note 1:
CY
/16 (for UxBRG = 0) and the minimum baud rate
/(4 * 65536).
2:
Baud Rate =
UxBRG =
CY
F
frequency.
Based on F
and PLL are disabled.
CY
/(16 * 65536).
(1)
denotes the instruction cycle clock
UART BAUD RATE WITH
BRGH = 1
2009 Microchip Technology Inc.
4 • (UxBRG + 1)
CY
4 • Baud Rate
= F
F
F
OSC
CY
CY
(1,2)
/2, Doze mode
– 1
CY
/4
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