PIC24FJ256GB106T-I/PT Microchip Technology, PIC24FJ256GB106T-I/PT Datasheet - Page 118

• Manufacturer Part Number: PIC24FJ256GB106T-I/PT
• Description: IC PIC MCU FLASH 256K 64-TQFP
• Manufacturer: Microchip Technology
• Series: PIC® 24Fr

Specifications of PIC24FJ256GB106T-I/PT

• Core Processor: PIC
• Core Size: 16-Bit
• Speed: 32MHz
• Connectivity: I²C, SPI, UART/USART, USB OTG
• Peripherals: Brown-out Detect/Reset, LVD, POR, PWM, WDT
• Number Of I /o: 51
• Program Memory Size: 256KB (85.5K x 24)
• Program Memory Type: FLASH
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 3.6 V
• Data Converters: A/D 16x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-TFQFP
• For Use With: DM240011 - KIT STARTER MPLAB FOR PIC24F MCUMA240014 - MODULE PLUG-IN PIC24
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Other names: PIC24FJ256GB106T-I/PTTR

PIC24FJ256GB110 FAMILY
REGISTER 7-39:
DS39897C-page 118
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 15
bit 14
bit 13
bit 12
bit 11-8
bit 7
bit 6-0
CPUIRQ
R-0
U-0
—
CPUIRQ: Interrupt Request from Interrupt Controller CPU bit
1 = An interrupt request has occurred but has not yet been Acknowledged by the CPU; this happens
0 = No interrupt request is unacknowledged
Unimplemented: Read as ‘0’
VHOLD: Vector Number Capture Configuration bit
1 = VECNUM contains the value of the highest priority pending interrupt
0 = VECNUM contains the value of the last Acknowledged interrupt (i.e., the last interrupt that has
Unimplemented: Read as ‘0’
ILR<3:0>: New CPU Interrupt Priority Level bits
1111 = CPU Interrupt Priority Level is 15
•
•
•
0001 = CPU Interrupt Priority Level is 1
0000 = CPU Interrupt Priority Level is 0
Unimplemented: Read as ‘0’
VECNUM<6:0>: Pending Interrupt Vector ID bits (pending vector number is VECNUM + 8)
0111111 = Interrupt vector pending is number 135
•
•
•
0000001 = Interrupt vector pending is number 9
0000000 = Interrupt vector pending is number 8
VECNUM6
when the CPU priority is higher than the interrupt priority
occurred with higher priority than the CPU, even if other interrupts are pending)
U-0
R-0
—
INTTREG: INTERRUPT CONTROL AND STATUS REGISTER
W = Writable bit
‘1’ = Bit is set
VECNUM5
VHOLD
R/W-0
R-0
VECNUM4
U-0
R-0
—
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
VECNUM3
ILR3
R-0
R-0
VECNUM2
ILR2
R-0
R-0
 2009 Microchip Technology Inc.
x = Bit is unknown
VECNUM1
ILR1
R-0
R-0
VECNUM0
ILR0
R-0
R-0
bit 8
bit 0