PIC16LC926-I/PT Microchip Technology, PIC16LC926-I/PT Datasheet - Page 104
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PIC16LC926-I/PT
Manufacturer Part Number
PIC16LC926-I/PT
Description
IC MCU CMOS 20MHZ 8K W/LCD64TQFP
Manufacturer
Microchip Technology
Series
PIC® 16Cr
Specifications of PIC16LC926-I/PT
Core Size
8-Bit
Program Memory Size
14KB (8K x 14)
Core Processor
PIC
Speed
20MHz
Connectivity
I²C, SPI
Peripherals
Brown-out Detect/Reset, LCD, POR, PWM, WDT
Number Of I /o
25
Program Memory Type
OTP
Ram Size
336 x 8
Voltage - Supply (vcc/vdd)
2.5 V ~ 5.5 V
Data Converters
A/D 5x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
64-TFQFP
Controller Family/series
PIC16C
No. Of I/o's
25
Ram Memory Size
336Byte
Cpu Speed
20MHz
No. Of Timers
3
Interface
I2C, SPI
Embedded Interface Type
I2C, SPI
Rohs Compliant
Yes
Processor Series
PIC16LC
Core
PIC
Data Bus Width
8 bit
Data Ram Size
336 B
Interface Type
I2C, SPI
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
25
Number Of Timers
1 x 16 bit
Operating Supply Voltage
2.5 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734
Development Tools By Supplier
ICE2000
Minimum Operating Temperature
- 40 C
On-chip Adc
5 bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Details
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC16LC926-I/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
Part Number:
PIC16LC926-I/PT
Manufacturer:
MIC
Quantity:
20 000
PIC16C925/926
12.4
12.4.1
A Power-on Reset pulse is generated on-chip when
V
take advantage of the POR, just tie the MCLR pin
directly (or through a resistor) to V
nate external RC components usually needed to create
a Power-on Reset. A maximum rise time for V
specified. See Electrical Specifications for details.
When the device starts normal operation (exits the
RESET condition), device operating parameters (volt-
age, frequency, temperature, etc.) must be met to
ensure operation. If these conditions are not met, the
device must be held in RESET until the operating con-
ditions are met.
For additional information, refer to Application Note
AN607, “Power-up Trouble Shooting.”
12.4.2
The Power-up Timer provides a fixed 72 ms nominal
time-out on power-up only, from the POR. The
Power-up Timer operates on an internal RC oscillator.
The chip is kept in RESET as long as the PWRT is
active. The PWRT’s time delay allows V
acceptable level. A configuration bit is provided to
enable/disable the PWRT.
The power-up time delay will vary from chip to chip due
to V
parameters for details.
12.4.3
The Oscillator Start-up Timer (OST), if enabled, pro-
vides 1024 oscillator cycle (from OSC1 input) delay
after the PWRT delay (if the PWRT is enabled). This
helps to ensure that the crystal oscillator or resonator
has started and stabilized.
The OST time-out is invoked only for XT, LP and HS
modes and only on Power-on Reset or wake-up from
SLEEP.
TABLE 12-3:
DS39544A-page 102
DD
DD
rise is detected (in the range of 1.5V - 2.1V). To
Oscillator Configuration
, temperature, and process variation. See DC
Power-on Reset (POR),
Power-up Timer (PWRT),
Brown-out Reset (BOR) and
Oscillator Start-up Timer (OST)
POWER-ON RESET (POR)
POWER-UP TIMER (PWRT)
OSCILLATOR START-UP TIMER
(OST)
XT, HS, LP
RC
TIME-OUT IN VARIOUS SITUATIONS
DD
. This will elimi-
DD
to rise to an
PWRTE = 1
1024T
—
DD
OSC
Preliminary
is
Power-up
12.4.4
The configuration bit, BOREN, can enable or disable
the Brown-out Reset circuit. If V
(parameter D005, about 4V) for longer than T
(parameter #35, about 100 S), the brown-out situation
will reset the device. If V
than T
Once the brown-out occurs, the device will remain in
Brown-out Reset until V
Power-up Timer, if enabled, then keeps the device in
RESET for T
V
Brown-out Reset process will restart when V
above V
Power-up Timer is enabled separately from Brown-out
Reset.
12.4.5
On power-up, the time-out sequence is as follows:
First, PWRT time-out is invoked after the POR time
delay has expired. Then, OST is activated. The total
time-out will vary based on oscillator configuration and
the status of the PWRT. For example, in RC mode with
the PWRT disabled, there will be no time-out at all.
Figure 12-7, Figure 12-8, and Figure 12-9 depict
time-out sequences on power-up.
Since the time-outs occur from the POR pulse, if MCLR
is kept low long enough, the time-outs will expire. Then
bringing MCLR high will begin execution immediately
(Figure 12-8). This is useful for testing purposes or to
synchronize more than one PIC16CXXX device oper-
ating in parallel.
Table 12-5 shows the RESET conditions for some spe-
cial function registers, while Table 12-6 shows the
RESET conditions for all the registers.
12.4.6
The Power Control/Status Register, PCON, has up to
two bits depending upon the device.
Bit0 is Brown-out Reset Status bit, BOR. Bit BOR is
unknown on a Power-on Reset. It must then be set by
the user and checked on subsequent RESETS to see if
bit BOR cleared, indicating a BOR occurred. When the
Brown-out Reset is disabled, the state of the BOR bit is
unpredictable and is, therefore, not valid at any time.
Bit1 is Power-on Reset Status bit POR. It is cleared on
a Power-on Reset and unaffected otherwise. The user
must set this bit following a Power-on Reset.
72 ms + 1024T
DD
PWRTE = 0
should fall below V
BOR
72 ms
BOR
, a RESET may not occur.
BROWN-OUT RESET (BOR)
TIME-OUT SEQUENCE
POWER CONTROL/STATUS
REGISTER (PCON)
PWRT
with the Power-up Timer Reset. The
OSC
(parameter #33, about 72mS). If
DD
DD
2001 Microchip Technology Inc.
Wake-up from SLEEP
BOR
falls below V
rises above V
1024 T
DD
during T
falls below V
—
OSC
BOR
PWRT
BOR
DD
for less
. The
, the
rises
BOR
BOR