PIC16LC926-I/PT Microchip Technology, PIC16LC926-I/PT Datasheet - Page 50
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PIC16LC926-I/PT
Manufacturer Part Number
PIC16LC926-I/PT
Description
IC MCU CMOS 20MHZ 8K W/LCD64TQFP
Manufacturer
Microchip Technology
Series
PIC® 16Cr
Specifications of PIC16LC926-I/PT
Core Size
8-Bit
Program Memory Size
14KB (8K x 14)
Core Processor
PIC
Speed
20MHz
Connectivity
I²C, SPI
Peripherals
Brown-out Detect/Reset, LCD, POR, PWM, WDT
Number Of I /o
25
Program Memory Type
OTP
Ram Size
336 x 8
Voltage - Supply (vcc/vdd)
2.5 V ~ 5.5 V
Data Converters
A/D 5x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
64-TFQFP
Controller Family/series
PIC16C
No. Of I/o's
25
Ram Memory Size
336Byte
Cpu Speed
20MHz
No. Of Timers
3
Interface
I2C, SPI
Embedded Interface Type
I2C, SPI
Rohs Compliant
Yes
Processor Series
PIC16LC
Core
PIC
Data Bus Width
8 bit
Data Ram Size
336 B
Interface Type
I2C, SPI
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
25
Number Of Timers
1 x 16 bit
Operating Supply Voltage
2.5 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734
Development Tools By Supplier
ICE2000
Minimum Operating Temperature
- 40 C
On-chip Adc
5 bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Details
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC16LC926-I/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
Part Number:
PIC16LC926-I/PT
Manufacturer:
MIC
Quantity:
20 000
PIC16C925/926
6.1
Timer mode is selected by clearing the TMR1CS
(T1CON<1>) bit. In this mode, the input clock to the
timer is F
(T1CON<2>) has no effect since the internal clock is
always in sync.
6.2
Counter mode is selected by setting bit TMR1CS. In
this mode, the timer increments on every rising edge of
clock input on pin RC1/T1OSI when bit T1OSCEN is
set, or pin RC0/T1OSO/T1CKI when bit T1OSCEN is
cleared.
If T1SYNC is cleared, then the external clock input is
synchronized with internal phase clocks. The synchro-
nization is done after the prescaler stage. The pres-
caler is an asynchronous ripple counter.
In this configuration, during SLEEP mode, Timer1 will
not increment even if the external clock is present,
since the synchronization circuit is shut-off. The pres-
caler however will continue to increment.
FIGURE 6-1:
DS39544A-page 48
Note 1: When the T1OSCEN bit is cleared, the inverter and feedback resistor are turned off. This eliminates power drain.
RC0/T1OSO/T1CKI
Timer1 Operation in Timer Mode
Timer1 Operation in Synchronized
Counter Mode
OSC
/4. The synchronize control bit T1SYNC
RC1/T1OSI
Set Flag bit
TMR1IF on
Overflow
TIMER1 BLOCK DIAGRAM
TMR1H
T1OSC
TMR1
TMR1L
Oscillator
Enable
T1OSCEN
Preliminary
(1)
Internal
Clock
F
OSC
/4
TMR1ON
6.2.1
When an external clock input is used for Timer1 in Syn-
chronized Counter mode, it must meet certain require-
ments. The external clock requirement is due to
internal phase clock (T
there is a delay in the actual incrementing of TMR1
after synchronization.
When the prescaler is 1:1, the external clock input is
the same as the prescaler output. The synchronization
of T1CKI with the internal phase clocks is accom-
plished by sampling the prescaler output on the Q2 and
Q4 cycles of the internal phase clocks. Therefore, it is
necessary for T1CKI to be high for at least 2T
a small RC delay of 20 ns), and low for at least 2T
(and a small RC delay of 20 ns). Refer to the appropri-
ate electrical specifications, parameters 45, 46, and 47.
When a prescaler other than 1:1 is used, the external
clock input is divided by the asynchronous ripple
counter type prescaler, so that the prescaler output is
symmetrical. In order for the external clock to meet the
sampling requirement, the ripple counter must be taken
into account. Therefore, it is necessary for T1CKI to
have a period of at least 4T
of 40 ns), divided by the prescaler value. The only
requirement on T1CKI high and low time is that they do
not violate the minimum pulse width requirements of
10 ns). Refer to the appropriate electrical specifica-
tions, parameters 40, 42, 45, 46, and 47.
On/Off
TMR1CS
1
0
T1CKPS1:T1CKPS0
EXTERNAL CLOCK INPUT TIMING
FOR SYNCHRONIZED COUNTER
MODE
T1SYNC
Prescaler
1, 2, 4, 8
0
1
2
OSC
2001 Microchip Technology Inc.
OSC
) synchronization. Also,
Synchronized
Clock Input
(and a small RC delay
Synchronize
SLEEP Input
det
OSC
(and
OSC