PIC16LC926-I/PT Microchip Technology, PIC16LC926-I/PT Datasheet - Page 126
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PIC16LC926-I/PT
Manufacturer Part Number
PIC16LC926-I/PT
Description
IC MCU CMOS 20MHZ 8K W/LCD64TQFP
Manufacturer
Microchip Technology
Series
PIC® 16Cr
Specifications of PIC16LC926-I/PT
Core Size
8-Bit
Program Memory Size
14KB (8K x 14)
Core Processor
PIC
Speed
20MHz
Connectivity
I²C, SPI
Peripherals
Brown-out Detect/Reset, LCD, POR, PWM, WDT
Number Of I /o
25
Program Memory Type
OTP
Ram Size
336 x 8
Voltage - Supply (vcc/vdd)
2.5 V ~ 5.5 V
Data Converters
A/D 5x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
64-TFQFP
Controller Family/series
PIC16C
No. Of I/o's
25
Ram Memory Size
336Byte
Cpu Speed
20MHz
No. Of Timers
3
Interface
I2C, SPI
Embedded Interface Type
I2C, SPI
Rohs Compliant
Yes
Processor Series
PIC16LC
Core
PIC
Data Bus Width
8 bit
Data Ram Size
336 B
Interface Type
I2C, SPI
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
25
Number Of Timers
1 x 16 bit
Operating Supply Voltage
2.5 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734
Development Tools By Supplier
ICE2000
Minimum Operating Temperature
- 40 C
On-chip Adc
5 bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Details
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC16LC926-I/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
Part Number:
PIC16LC926-I/PT
Manufacturer:
MIC
Quantity:
20 000
PIC16C925/926
IORWF
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Q Cycle Activity:
Example
DS39544A-page 124
Before Instruction:
After Instruction:
RESULT
W
RESULT
W
Z
Inclusive OR W with f
[ label ]
0
d
(W).OR. (f)
Z
Inclusive OR the W register with reg-
ister ’f’. If ’d’ is 0, the result is placed
in the W register. If ’d’ is 1, the result
is placed back in register ’f’.
1
1
IORWF
Decode
Q1
=
=
=
=
=
00
f
[0,1]
127
0x13
0x91
0x13
0x93
0
IORWF
register
0100
Read
Q2
’f’
(destination)
RESULT, 0
Process
dfff
f [,d]
data
Q3
destination
Write to
ffff
Q4
Preliminary
MOVF
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Q Cycle Activity:
Example
MOVLW
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Q Cycle Activity:
Example
After Instruction:
After Instruction:
W
Z
W
=
=
=
value in FSR register
1 if W = 0
0x5A
Move f
[ label ]
0
d
(f)
Z
The contents of register f are moved
to a destination dependant upon the
status of d. If d = 0, the destination is
W register. If d = 1, the destination is
file register f itself. d = 1 is useful to
test a file register, since status flag Z
is affected.
1
1
MOVF
Move Literal to W
[ label ]
0
k
None
The eight-bit literal ’k’ is loaded into
W register. The don’t cares will
assemble as 0’s.
1
1
MOVLW
Decode
Decode
Q1
Q1
00
11
f
k
[0,1]
(W)
(destination)
2001 Microchip Technology Inc.
127
255
FSR,
MOVLW k
MOVF f [,d]
literal ’k’
register
1000
Read
00xx
Read
0x5A
Q2
Q2
’f’
0
Process
Process
kkkk
dfff
data
data
Q3
Q3
destination
Write to
Write to
kkkk
ffff
Q4
W
Q4