ATMEGA128A-MUR Atmel, ATMEGA128A-MUR Datasheet - Page 140
![MCU AVR 128K FLASH 16MHZ 64QFN](/photos/12/13/121326/313-64-qfn_sml.jpg)
ATMEGA128A-MUR
Manufacturer Part Number
ATMEGA128A-MUR
Description
MCU AVR 128K FLASH 16MHZ 64QFN
Manufacturer
Atmel
Series
AVR® ATmegar
Specifications of ATMEGA128A-MUR
Core Processor
AVR
Core Size
8-Bit
Speed
16MHz
Connectivity
EBI/EMI, I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
53
Program Memory Size
128KB (64K x 16)
Program Memory Type
FLASH
Eeprom Size
4K x 8
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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15.11.11 OCR1CH and OCR1CL - Output Compare Register 1 C
15.11.12 OCR3AH and OCR3AL - Output Compare Register 3 A
15.11.13 OCR3BH and OCR3BL - Output Compare Register 3 B
15.11.14 OCR3CH and OCR3CL - Output Compare Register 3 C
15.11.15 ICR1H and ICR1L - Input Capture Register 1
8151H–AVR–02/11
The Output Compare Registers contain a 16-bit value that is continuously compared with the
counter value (TCNTn). A match can be used to generate an output compare interrupt, or to
generate a waveform output on the OCnx pin.
The Output Compare Registers are 16-bit in size. To ensure that both the high and low bytes are
written simultaneously when the CPU writes to these registers, the access is performed using an
8-bit temporary High Byte Register (TEMP). This Temporary Register is shared by all the other
16-bit registers.
Bit
Read/Write
Initial Value
Bit
Read/Write
Initial Value
Bit
Read/Write
Initial Value
Bit
Read/Write
Initial Value
Bit
Read/Write
Initial Value
See “Accessing 16-bit Registers” on page 115.
R/W
R/W
R/W
R/W
R/W
7
0
7
0
7
0
7
0
7
0
R/W
R/W
R/W
R/W
R/W
6
0
6
0
6
0
6
0
6
0
R/W
R/W
R/W
R/W
R/W
5
0
5
0
5
0
5
0
5
0
R/W
R/W
R/W
R/W
R/W
4
0
4
0
4
OCR3A[15:8]
0
4
OCR3B[15:8]
0
OCR3C[15:8]
4
0
OCR1C[15:8]
OCR3C[7:0]
OCR1C[7:0]
OCR3A[7:0]
OCR3B[7:0]
ICR1[15:8]
ICR1[7:0]
R/W
R/W
R/W
R/W
R/W
3
0
3
0
3
0
3
0
3
0
R/W
R/W
R/W
R/W
R/W
2
0
2
0
2
0
2
0
2
0
ATmega128A
R/W
R/W
R/W
R/W
R/W
1
0
1
0
1
0
1
0
1
0
R/W
R/W
R/W
R/W
R/W
0
0
0
0
0
0
0
0
0
0
OCR3CH
OCR3AH
OCR3BH
OCR3CL
OCR1CH
OCR3AL
OCR3BL
OCR1CL
ICR1H
ICR1L
140
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