ATXMEGA16A4-CU Atmel, ATXMEGA16A4-CU Datasheet - Page 84
![MCU AVR 16+4KB FLASH 49VFBGA](/photos/12/32/123215/49c2-vfbga_sml.jpg)
ATXMEGA16A4-CU
Manufacturer Part Number
ATXMEGA16A4-CU
Description
MCU AVR 16+4KB FLASH 49VFBGA
Manufacturer
Atmel
Series
AVR® XMEGAr
Specifications of ATXMEGA16A4-CU
Core Processor
AVR
Core Size
8/16-Bit
Speed
32MHz
Connectivity
I²C, IrDA, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, DMA, POR, PWM, WDT
Number Of I /o
34
Program Memory Size
16KB (8K x 16)
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
1.6 V ~ 3.6 V
Data Converters
A/D 12x12b, D/A 2x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
49-VFBGA
Processor Series
ATXMEGA16x
Core
AVR8
Data Bus Width
8 bit, 16 bit
Data Ram Size
2 KB
Interface Type
I2C/SPI/USART
Maximum Clock Frequency
32 MHz
Number Of Programmable I/os
34
Number Of Timers
5
Operating Supply Voltage
1.6 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWAVR, EWAVR-BL
Development Tools By Supplier
ATAVRDRAGON, ATAVRISP2, ATAVRONEKIT
Minimum Operating Temperature
- 40 C
On-chip Adc
12-ch x 12-bit
On-chip Dac
2-ch x 12-bit
For Use With
ATAVRONEKIT - KIT AVR/AVR32 DEBUGGER/PROGRMMRATSTK600 - DEV KIT FOR AVR/AVR32770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAG770-1004 - ISP 4PORT FOR ATMEL AVR MCU SPI
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
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7.9
7.9.1
7.9.2
8077H–AVR–12/09
Register Description - Clock
CTRL - System Clock Control Register
PSCTRL - System Clock Prescaler Register
• Bit 7:3 - Reserved
These bits are unused and reserved for future use. For compatibility with future devices, always
write these bits to zero when this register is written.
• Bit 2:0 - SCLKSEL[2:0]: System Clock Selection
SCLKSEL is used to select the source for the System Clock. See
selections. Changing the system clock source will take 2 clock cycles on the old clock source
and 2 clock cycles on the new clock source. These bits are protected by the Configuration
Change Protection mechanism, for details refer to
tion” on page
SCLKSEL cannot be changed if the new source is not stable.
Table 7-1.
• Bit 7 - Reserved
This bit is reserved and will always be read as zero. For compatibility with future devices, always
write this bit to zero when this register is written.
Bit
+0x00
Read/Write
Initial Value
Bit
+0x01
Read/Write
Initial Value
SCLKSEL[2:0]
000
001
010
011
100
101
110
111
12.
R
7
0
System Clock Selection
-
R
7
0
-
R/W
6
0
6
R
0
-
R/W
5
0
Group Configuration
R
5
0
-
RC32MHz
RC32KHz
PSADIV[4:0]
RC2MHz
XOSC
PLL
R/W
4
0
-
-
-
R
4
0
-
Section 3.12 ”Configuration Change Protec-
R/W
3
0
R
3
0
-
Description
External Oscillator or Clock
Phase Locked Loop
Reserved
Reserved
Reserved
2 MHz Internal RC Oscillator
32 MHz Internal RC Oscillator
32 kHz Internal RC Oscillator
R/W
R/W
2
0
2
0
SCLKSEL[2:0]
Table 7-1
R/W
R/W
1
0
1
0
PSBCDIV
XMEGA A
R/W
for the different
R/W
0
0
0
0
PSCTRL
CTRL
84
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