DSPIC30F4012-30I/SP Microchip Technology, DSPIC30F4012-30I/SP Datasheet - Page 137

• Manufacturer Part Number: DSPIC30F4012-30I/SP
• Description: IC DSPIC MCU/DSP 48K 28DIP
• Manufacturer: Microchip Technology
• Series: dsPIC™ 30Fr

Specifications of DSPIC30F4012-30I/SP

• Program Memory Type: FLASH
• Program Memory Size: 48KB (16K x 24)
• Package / Case: 28-DIP (0.300", 7.62mm)
• Core Processor: dsPIC
• Core Size: 16-Bit
• Speed: 30 MIPs
• Connectivity: CAN, I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, Motor Control PWM, QEI, POR, PWM, WDT
• Number Of I /o: 20
• Eeprom Size: 1K x 8
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 2.5 V ~ 5.5 V
• Data Converters: A/D 6x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Product: DSCs
• Data Bus Width: 16 bit
• Processor Series: DSPIC30F
• Core: dsPIC
• Maximum Clock Frequency: 30 MHz
• Number Of Programmable I/os: 20
• Data Ram Size: 2 KB
• Maximum Operating Temperature: + 85 C
• Mounting Style: Through Hole
• 3rd Party Development Tools: 52713-733, 52714-737, 53276-922, EWDSPIC
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, ICE4000, DM240002, DM300027, DM330011, DM300018, DM183021
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: DV164005 - KIT ICD2 SIMPLE SUIT W/USB CABLE
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: DSPIC30F401230ISP

20.7
The analog input model of the 10-bit A/D converter is
shown in Figure 20-2. The total sampling time for the
A/D is a function of the internal amplifier settling time,
device V
For the A/D converter to meet its specified accuracy,
the charge holding capacitor (C
to fully charge to the voltage level on the analog input
pin. The source impedance (R
impedance (R
(R
required to charge the capacitor C
impedance of the analog sources must therefore be
small enough to fully charge the holding capacitor
within the chosen sample time. To minimize the effects
of pin leakage currents on the accuracy of the A/D con-
verter, the maximum recommended source imped-
ance, R
selected (changed), this sampling function must be
completed prior to starting the conversion. The internal
holding capacitor will be in a discharged state prior to
each sample operation.
FIGURE 20-2:
 2005 Microchip Technology Inc.
SS
) impedance combine to directly affect the time
S
DD
A/D Acquisition Requirements
, is 5 kΩ. After the analog input channel is
and the holding capacitor charge time.
Note: C
IC
), and the internal sampling switch
Legend: C
VA
PIN
Rs
A/D CONVERTER ANALOG INPUT MODEL
value depends on device package and is not tested. Effect of C
V
I leakage
R
R
C
ANx
T
PIN
IC
SS
HOLD
C
PIN
HOLD
S
HOLD
= input capacitance
= threshold voltage
= leakage current at the pin due to
= interconnect resistance
= sampling switch resistance
= sample/hold capacitance (from DAC)
), the interconnect
various junctions
) must be allowed
. The combined
V
DD
V
V
T
T
= 0.6V
= 0.6V
Preliminary
R
I leakage
± 500 nA
IC
≤ 250Ω
The user must allow at least 1 T
time, T
ple to be acquired. This sample time may be controlled
manually in software by setting/clearing the SAMP bit,
or it may be automatically controlled by the A/D con-
verter. In an automatic configuration, the user must
allow enough time between conversion triggers so that
the minimum sample time can be satisfied. Refer to the
Electrical Specifications for T
requirements.
dsPIC30F4011/4012
SAMP
Sampling
Switch
R
, between conversions to allow each sam-
SS
PIN
R
negligible if Rs ≤ 5 kΩ.
SS
V
SS
C
= DAC capacitance
= 4.4 pF
≤ 3 kΩ
HOLD
AD
AD
DS70135C-page 135
period of sampling
and sample time