ATXMEGA128D3-AU Atmel, ATXMEGA128D3-AU Datasheet - Page 92

• Manufacturer Part Number: ATXMEGA128D3-AU
• Description: MCU AVR 128K FLASH 3.6V 64TQFP
• Manufacturer: Atmel
• Series: AVR® XMEGAr

Specifications of ATXMEGA128D3-AU

• Core Processor: AVR
• Core Size: 8/16-Bit
• Speed: 32MHz
• Connectivity: I²C, IrDA, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 50
• Program Memory Size: 128KB (64K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 2K x 8
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 1.6 V ~ 3.6 V
• Data Converters: A/D 16x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-TQFP, 64-VQFP
• Processor Series: XMEGA
• Core: AVR
• Data Bus Width: 8 bit, 16 bit
• Data Ram Size: 8 KB
• Interface Type: SPI, TWI, USART
• Maximum Clock Frequency: 32 MHz
• Number Of Programmable I/os: 50
• Number Of Timers: 5
• Operating Supply Voltage: 2.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWAVR, EWAVR-BL
• Minimum Operating Temperature: - 40 C
• Operating Temperature Range: - 40 C to + 85 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

8134I–AVR–12/10
16. NMI Flag for Crystal Oscillator Failure automatically cleared
17. Crystal start-up time required after power-save even if crystal is source for RTC
18. RTC Counter value not correctly read after sleep
19. Pending asynchronous RTC-interrupts will not wake up device
20. TWI Transmit collision flag not cleared on repeated start
21. Clearing TWI Stop Interrupt Flag may lock the bus
NMI flag for Crystal Oscillator Failure (XOSCFDIF) will be automatically cleared when exe-
cuting the NMI interrupt handler.
Problem fix/Workaround
This device revision has only one NMI interrupt source, so checking the interrupt source in
software is not required.
Even if 32.768 kHz crystal is used for RTC during sleep, the clock from the crystal will not be
ready for the system before the specified start-up time. See "XOSCSEL[3:0]: Crystal Oscilla-
tor Selection" in XMEGA A Manual. If BOD is used in active mode, the BOD will be on during
this period (0.5s).
Problem fix/Workaround
If faster start-up is required, go to sleep with internal oscillator as system clock.
If the RTC is set to wake up the device on RTC Overflow and bit 0 of RTC CNT is identical to
bit 0 of RTC PER as the device is entering sleep, the value in the RTC count register can not
be read correctly within the first prescaled RTC clock cycle after wakeup. The value read will
be the same as the value in the register when entering sleep.
The same applies if RTC Compare Match is used as wake-up source.
Problem fix/Workaround
Wait at least one prescaled RTC clock cycle before reading the RTC CNT value.
Asynchronous Interrupts from the Real-Time-Counter that is pending when the sleep
instruction is executed, will be ignored until the device is woken from another source or the
source triggers again.
Problem fix/Workaround
None.
The TWI transmit collision flag should be automatically cleared on start and repeated start,
but is only cleared on start.
Problem fix/Workaround
Clear the flag in software after address interrupt.
If software clears the STOP Interrupt Flag (APIF) on the same Peripheral Clock cycle as the
hardware sets this flag due to a new address received, CLKHOLD is not cleared and the
SCL line is not released. This will lock the bus.
Problem fix/Workaround
Check if the bus state is IDLE. If this is the case, it is safe to clear APIF. If the bus state is
not IDLE, wait for the SCL pin to be low before clearing APIF.
Code:
/* Only clear the interrupt flag if within a "safe zone". */
while ( /* Bus not IDLE: */
XMEGA D3
92