AT90CAN64-16MU Atmel, AT90CAN64-16MU Datasheet - Page 137

• Manufacturer Part Number: AT90CAN64-16MU
• Description: IC MCU AVR 64K FLASH 64-QFN
• Manufacturer: Atmel
• Series: AVR® 90CANr

Specifications of AT90CAN64-16MU

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 16MHz
• Connectivity: CAN, EBI/EMI, I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 53
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 2K x 8
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-VQFN Exposed Pad, 64-HVQFN, 64-SQFN, 64-DHVQFN
• Processor Series: AT90CANx
• Core: AVR8
• Data Bus Width: 8 bit
• Data Ram Size: 4 KB
• Interface Type: 2-Wire, SPI, USART
• Maximum Clock Frequency: 16 MHz
• Number Of Programmable I/os: 53
• Number Of Timers: 2
• Operating Supply Voltage: 0.5 V to 0.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWAVR, EWAVR-BL
• Development Tools By Supplier: ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATDVK90CAN1, ATADAPCAN01
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 8 Channel
• For Use With: ATSTK600-TQFP64 - STK600 SOCKET/ADAPTER 64-TQFP770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAGATDVK90CAN1 - KIT DEV FOR AT90CAN128 MCU
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

7679H–CAN–08/08
Table 13-3
correct or the phase and frequency correct, PWM mode.
Table 13-3.
Note:
• Bit 1:0 – WGMn1:0: Waveform Generation Mode
Combined with the WGMn3:2 bits found in the TCCRnB Register, these bits control the counting
sequence of the counter, the source for maximum (TOP) counter value, and what type of wave-
form generation to be used, see
unit are: Normal mode (counter), Clear Timer on Compare match (CTC) mode, and three types
of Pulse Width Modulation (PWM) modes.
COMnA1/COMnB1/
COMnC1
1. A special case occurs when OCnA/OCnB/OCnC equals TOP and
0
0
1
1
COMnA1/COMnB1/COMnC1 is set.
details.
shows the COMnx1:0 bit functionality when the WGMn3:0 bits are set to the phase
Compare Output Mode, Phase Correct and Phase and Frequency Correct
PWM
(1)
COMnA0/COMnB0/
COMnC0
Table
0
1
0
1
13-4. Modes of operation supported by the Timer/Counter
(See “Modes of Operation” on page
See “Phase Correct PWM Mode” on page 130.
Description
Normal port operation, OCnA/OCnB/OCnC
disconnected.
WGMn3=0: Normal port operation,
OCnA/OCnB/OCnC disconnected.
WGMn3=1: Toggle OCnA on Compare Match,
OCnB/OCnC reserved.
Clear OCnA/OCnB/OCnC on Compare Match when
up-counting.
Set OCnA/OCnB/OCnC on Compare Match when
downcounting.
Set OCnA/OCnB/OCnC on Compare Match when up-
counting.
Clear OCnA/OCnB/OCnC on Compare Match when
downcounting.
AT90CAN32/64/128
126.).
for more
137