PIC18F2685-I/SO Microchip Technology, PIC18F2685-I/SO Datasheet - Page 181

IC PIC MCU FLASH 48KX16 28SOIC

PIC18F2685-I/SO

Manufacturer Part Number
PIC18F2685-I/SO
Description
IC PIC MCU FLASH 48KX16 28SOIC
Manufacturer
Microchip Technology
Series
PIC® 18Fr

Specifications of PIC18F2685-I/SO

Program Memory Type
FLASH
Program Memory Size
96KB (48K x 16)
Package / Case
28-SOIC (7.5mm Width)
Core Processor
PIC
Core Size
8-Bit
Speed
40MHz
Connectivity
CAN, I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, HLVD, POR, PWM, WDT
Number Of I /o
25
Eeprom Size
1K x 8
Ram Size
3.25K x 8
Voltage - Supply (vcc/vdd)
4.2 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
PIC18F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
3.25 KB
Interface Type
EUSART/I2C/MSSP/SPI
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
28
Number Of Timers
4
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, DV164136
Minimum Operating Temperature
- 40 C
On-chip Adc
8-ch x 10-bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
XLT28SO-1 - SOCKET TRANSITION 28SOIC 300MIL
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
16.4.5
In Full-Bridge Output mode, four pins are used as
outputs; however, only two outputs are active at a time.
In the Forward mode, pin P1A is continuously active
and pin P1D is modulated. In the Reverse mode, pin
P1C is continuously active and pin P1B is modulated.
These are illustrated in Figure 16-6.
FIGURE 16-6:
© 2009 Microchip Technology Inc.
Note 1: At this time, the TMR2 register is equal to the PR2 register.
Note
Forward Mode
Reverse Mode
P1A
P1B
P1C
P1D
P1A
P1B
P1C
P1D
FULL-BRIDGE MODE
2: Output signal is shown as active-high.
(2)
(2)
(2)
(2)
(2)
(2)
(2)
(2)
FULL-BRIDGE PWM OUTPUT
(1)
(1)
Duty Cycle
Duty Cycle
PIC18F2682/2685/4682/4685
Period
Period
P1A, P1B, P1C and P1D outputs are multiplexed with
the
PORTD<7> data latches. The TRISD<4>, TRISD<5>,
TRISD<6> and TRISD<7> bits must be cleared to
make the P1A, P1B, P1C and P1D pins outputs.
PORTD<4>,
(1)
(1)
PORTD<5>,
DS39761C-page 181
PORTD<6>
and

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