AT91SAM7X512-AU Atmel, AT91SAM7X512-AU Datasheet - Page 405

MCU ARM 512K HS FLASH 100-LQFP

AT91SAM7X512-AU

Manufacturer Part Number
AT91SAM7X512-AU
Description
MCU ARM 512K HS FLASH 100-LQFP
Manufacturer
Atmel
Series
AT91SAMr
Datasheet

Specifications of AT91SAM7X512-AU

Core Processor
ARM7
Core Size
16/32-Bit
Speed
55MHz
Connectivity
CAN, Ethernet, I²C, SPI, SSC, UART/USART, USB
Peripherals
Brown-out Detect/Reset, DMA, POR, PWM, WDT
Number Of I /o
62
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
128K x 8
Voltage - Supply (vcc/vdd)
1.65 V ~ 1.95 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-LQFP
Processor Series
AT91SAMx
Core
ARM7TDMI
Data Bus Width
32 bit
Data Ram Size
128 KB
Interface Type
CAN, SPI, SSC, TWI, USART, USB
Maximum Clock Frequency
55 MHz
Number Of Programmable I/os
13
Number Of Timers
3
Operating Supply Voltage
3 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
JTRACE-ARM-2M, KSK-AT91SAM7X-PL, MDK-ARM, RL-ARM, ULINK2
Development Tools By Supplier
AT91SAM-ICE, AT91-ISP, AT91SAM7X-EK
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit
No. Of I/o's
62
Ram Memory Size
128KB
Cpu Speed
55MHz
No. Of Timers
3
No. Of Pwm Channels
4
Digital Ic Case Style
LQFP
Rohs Compliant
Yes
For Use With
AT91SAM-ICE - EMULATOR FOR AT91 ARM7/ARM9AT91SAM7X-EK - KIT EVAL FOR AT91SAM7X256/128
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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AT91SAM7X512-AU
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32.6
Table 32-4.
Notes:
6120H–ATARM–17-Feb-09
0x00 + channel * 0x40 + 0x0C
0x00 + channel * 0x40 + 0x1C
0x00 + channel * 0x40 + 0x2C
0x00 + channel * 0x40 + 0x00
0x00 + channel * 0x40 + 0x04
0x00 + channel * 0x40 + 0x08
0x00 + channel * 0x40 + 0x10
0x00 + channel * 0x40 + 0x14
0x00 + channel * 0x40 + 0x18
0x00 + channel * 0x40 + 0x20
0x00 + channel * 0x40 + 0x24
0x00 + channel * 0x40 + 0x28
Timer Counter (TC) User Interface
1. Channel index ranges from 0 to 2.
2. Read-only if WAVE = 0
Offset
Register Mapping
0xFC
0xC0
0xC4
(1)
Register
Channel Control Register
Channel Mode Register
Reserve
Reserved
Counter Value
Register A
Register B
Register C
Status Register
Interrupt Enable Register
Interrupt Disable Register
Interrupt Mask Register
Block Control Register
Block Mode Register
Reserved
AT91SAM7X512/256/128 Preliminary
TC_CMR
TC_CCR
TC_BCR
TC_BMR
TC_IDR
TC_IMR
TC_IER
TC_RC
TC_CV
TC_RA
TC_RB
TC_SR
Name
Read-write
Read-write
Read-write
Read-write
Read-write
Read-only
Read-only
Read-only
Write-only
Write-only
Write-only
Write-only
Access
(2)
(2)
Reset
0
0
0
0
0
0
0
0
405

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