P87LPC760BDH,112 NXP Semiconductors, P87LPC760BDH,112 Datasheet - Page 30

• Manufacturer Part Number: P87LPC760BDH,112
• Description: IC 80C51 MCU 1K OTP 14-TSSOP
• Manufacturer: NXP Semiconductors
• Series: LPC700r

Specifications of P87LPC760BDH,112

• Program Memory Type: OTP
• Program Memory Size: 1KB (1K x 8)
• Package / Case: 14-TSSOP
• Core Processor: 8051
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: I²C, UART/USART
• Peripherals: Brown-out Detect/Reset, LED, POR, WDT
• Number Of I /o: 12
• Ram Size: 128 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 6 V
• Oscillator Type: Internal
• Operating Temperature: 0°C ~ 70°C
• Processor Series: P87LPC7x
• Core: 80C51
• Data Bus Width: 8 bit
• Data Ram Size: 128 B
• Interface Type: I2C/UART
• Maximum Clock Frequency: 20 MHz
• Number Of Programmable I/os: 12
• Number Of Timers: 2
• Operating Supply Voltage: 2.7 V to 6 V
• Maximum Operating Temperature: + 70 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: PK51, CA51, A51, ULINK2
• Minimum Operating Temperature: 0 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: OM10063 - PROGRAMMER LPC700 P76XLCPOM10050 - EMULATOR LPC700 PDS76X
• Eeprom Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 568-1015-5; 935271146112; P87LPC760BDH

Philips Semiconductors
Timer/Counters
The P87LPC760 has two general purpose counter/timers which are
upward compatible with the standard 80C51 Timer 0 and Timer 1.
Both can be configured to operate as timers or can be configured to
be an event counter (see Figure 22). An option to automatically
toggle the T0 pin upon timer overflow has been added.
In the “Timer” function, the register is incremented every machine
cycle. Thus, one can think of it as counting machine cycles. Since a
machine cycle consists of 6 CPU clock periods, the count rate is 1/6
of the CPU clock frequency. Refer to the section Enhanced CPU for
a description of the CPU clock.
In the “Counter” function of Timer 0, the register is incremented in
response to a 1-to-0 transition at its corresponding external input
pin, T0. In this function, the external input is sampled once during
every machine cycle. When the samples of the pin state show a
2002 Mar 07
Low power, low price, low pin count (14 pin)
microcontroller with 1 kbyte OTP
TMOD
TMOD.2
BIT
TMOD.7, 6
TMOD.5, 4
TMOD.3
TMOD.1, 0
Address: 89h
Not Bit Addressable
SYMBOL
M1, M0
M1, M0
M1, M0
GATE
C/T
0 0
0 1
1 0
1 1
–
–
7
FUNCTION
Reserved. Must be written with zeros only.
Mode Select for Timer 1 (see table below).
Gating control for Timer 0. When set, Timer/Counter is enabled only while the INT0 pin is high and
the TR0 control pin is set. When cleared, Timer 0 is enabled when the TR0 control bit is set.
Timer or Counter Selector for Timer 0. Cleared for Timer operation (input from internal system clock.)
Set for Counter operation (input from T0 input pin).
Mode Select for Timer 0 (see table below).
Timer Mode
8048 Timer “TLn” serves as 5-bit prescaler.
16-bit Timer/Counter “THn” and “TLn” are cascaded; there is no prescaler.
8-bit auto-reload Timer/Counter. THn holds a value which is loaded into TLn when it overflows.
Timer 0 is a dual 8-bit Timer/Counter in this mode. TL0 is an 8-bit Timer/Counter controlled by the
standard Timer 0 control bits. TH0 is an 8-bit timer only, controlled by the Timer 1 control bits (see
text). Timer 1 in this mode is stopped.
Figure 22. Timer/Counter Mode Control Register (TMOD)
–
6
M1
5
T1
M0
4
27
GATE
The “Timer” or “Counter” function of Timer 0 is selected by control bit
operating modes, which are selected by bit-pairs (M1, M0) in TMOD.
Modes 0, 1, and 2 are the same for both Timers/Counters. Mode 3 is
3
high in one cycle and a low in the next cycle, the count is
incremented. The new count value appears in the register during the
cycle following the one in which the transition was detected. Since it
takes 2 machine cycles (12 CPU clocks) to recognize a 1-to-0
transition, the maximum count rate is 1/6 of the CPU clock
frequency. There are no restrictions on the duty cycle of the external
input signal, but to ensure that a given level is sampled at least once
before it changes, it should be held for at least one full machine
cycle.
C/T in the Special Function Register TMOD. In addition to the
“Timer” or “Counter” selection, Timer 0 and Timer 1 have four
different. The four operating modes are described in the following
text.
C/T
2
T0
M1
1
M0
0
P87LPC760
Reset Value: 00h
SU01542
Preliminary data