P87C52X2FN,112 NXP Semiconductors, P87C52X2FN,112 Datasheet - Page 41
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P87C52X2FN,112
Manufacturer Part Number
P87C52X2FN,112
Description
IC 80C51 MCU 256 RAM 40DIP
Manufacturer
NXP Semiconductors
Series
87Cr
Datasheet
1.P87C52X2BN112.pdf
(62 pages)
Specifications of P87C52X2FN,112
Core Processor
8051
Core Size
8-Bit
Speed
33MHz
Connectivity
EBI/EMI, UART/USART
Peripherals
POR
Number Of I /o
32
Program Memory Size
8KB (8K x 8)
Program Memory Type
OTP
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
40-DIP (0.600", 15.24mm)
Processor Series
P87C5x
Core
80C51
Data Bus Width
8 bit
Data Ram Size
256 B
Interface Type
UART
Maximum Clock Frequency
33 MHz
Number Of Programmable I/os
32
Number Of Timers
3
Operating Supply Voltage
2.7 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
PK51, CA51, A51, ULINK2
Minimum Operating Temperature
- 40 C
Package
40PDIP
Device Core
80C51
Family Name
87C
Maximum Speed
33 MHz
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Data Converters
-
Lead Free Status / Rohs Status
Details
Other names
935269602112
P87C52X2FN
P87C52X2FN
P87C52X2FN
P87C52X2FN
1. Parameters are valid over operating temperature range unless otherwise specified.
2. Load capacitance for port 0, ALE, and PSEN = 100 pF, load capacitance for all outputs = 80 pF
3. Interfacing the microcontroller to devices with float time up to 45 ns is permitted. This limited bus contention will not cause damage to port 0
4. Parts are guaranteed by design to operate down to 0 Hz.
Philips Semiconductors
AC ELECTRICAL CHARACTERISTICS (12-CLOCK MODE, 2.7 V TO 5.5 V OPERATION)
T
NOTES:
2003 Jan 24
Symbol
1/t
t
t
t
t
t
t
t
t
t
t
t
Data Memory
t
t
t
t
t
t
t
t
t
t
t
t
t
t
External Clock
t
t
t
t
Shift register
t
t
t
t
t
amb
LHLL
AVLL
LLAX
LLIV
LLPL
PLPH
PLIV
PXIX
PXIZ
AVIV
PLAZ
RLRH
WLWH
RLDV
RHDX
RHDZ
LLDV
AVDV
LLWL
AVWL
QVWX
WHQX
QVWH
RLAZ
WHLH
CHCX
CLCX
CLCH
CHCL
XLXL
QVXH
XHQX
XHDX
XHDV
80C51 8-bit microcontroller family
4K/8K/16K/32K ROM/OTP, low voltage (2.7 to 5.5 V),
low power, high speed (30/33 MHz)
CLCL
drivers.
= 0 C to +70 C or –40 C to +85 C ; V
Figure
31
27
27
27
27
27
27
27
27
27
27
27
28
29
28
28
28
28
28
28, 29
28, 29
29
29
29
28
28, 29
31
31
31
31
30
30
30
30
30
Parameter
Oscillator frequency
ALE pulse width
Address valid to ALE low
Address hold after ALE low
ALE low to valid instruction in
ALE low to PSEN low
PSEN pulse width
PSEN low to valid instruction in
Input instruction hold after PSEN
Input instruction float after PSEN
Address to valid instruction in
PSEN low to address float
RD pulse width
WR pulse width
RD low to valid data in
Data hold after RD
Data float after RD
ALE low to valid data in
Address to valid data in
ALE low to RD or WR low
Address valid to WR low or RD low
Data valid to WR transition
Data hold after WR
Data valid to WR high
RD low to address float
RD or WR high to ALE high
High time
Low time
Rise time
Fall time
Serial port clock cycle time
Output data setup to clock rising edge
Output data hold after clock rising edge
Input data hold after clock rising edge
Clock rising edge to input data valid
CC
= 2.7 V to 5.5 V, V
SS
= 0 V
41
1,2,3,4
Limits
MIN
0
2t
t
–
t
3 t
–
0
–
–
–
6 t
6 t
–
0
–
–
–
3 t
4 t
t
t
7 t
–
t
0.32 t
0.32 t
–
–
12 t
10 t
2 t
0
–
t
CLCL
CLCL
CLCL
CLCL
CLCL
CLCL
CLCL
CLCL
CLCL
CLCL
CLCL
CLCL
CLCL
CLCL
CLCL
CLCL
CLCL
CLCL
–25
–15
–30
–20
–15
–10
–15
–15
–25
–25
–20
–20
–10
–15
–25
MAX
16
–
–
–
4 t
–
–
3 t
–
t
5 t
10
–
–
5 t
–
2 t
8 t
9 t
3 t
–
–
–
–
0
t
t
t
5
5
–
–
–
–
10 t
CLCL
CLCL
CLCL
CLCL
CLCL
CLCL
CLCL
CLCL
CLCL
CLCL
CLCL
CLCL
CLCL
–10
+15
– t
– t
–55
–55
–50
–50
–20
–55
–50
+20
P80C3xX2; P80C5xX2;
CLCX
CHCX
–133
16 MHz Clock
MIN
–
115
47.5
37.5
–
47.5
172.5
–
0
–
–
–
350
350
–
0
–
–
–
167.5
230
32.5
42.5
427.5
–
47.5
–
–
–
–
750
600
110
0
–
MAX
–
–
–
–
195
–
–
132.5
–
52.5
262.5
10
–
–
262.5
–
105
445
512.5
207.5
–
–
–
–
0
77.5
–
–
–
–
–
–
–
–
492
P87C5xX2
Product data
Unit
MHz
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns