LPC11C12FBD48/301 NXP Semiconductors, LPC11C12FBD48/301 Datasheet - Page 38

• Manufacturer Part Number: LPC11C12FBD48/301
• Description: IC MCU 32BIT 16KB FLASH 48LQFP
• Manufacturer: NXP Semiconductors
• Series: LPC1100r

Specifications of LPC11C12FBD48/301

• Core Processor: ARM Cortex-M0
• Core Size: 32-Bit
• Speed: 50MHz
• Connectivity: CAN, I²C, Microwire, SPI, SSI, SSP, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, WDT
• Number Of I /o: 40
• Program Memory Size: 16KB (16K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 3.6 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 48-LQFP
• Processor Series: LPC11
• Core: ARM Cortex M0
• Data Bus Width: 32 bit
• Data Ram Size: 8 KB
• Interface Type: CAN, I2C, SPI, UART
• Maximum Clock Frequency: 50 MHz
• Number Of Programmable I/os: 40
• Number Of Timers: 1
• Operating Supply Voltage: 3.3 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 8 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details
• Other names: 568-5097; LPC11C12FBD48/301

NXP Semiconductors
LPC11CX2_CX4
Product data sheet
Fig 9.
Fig 10. Deep-sleep mode: Typical supply current I
(1) System oscillator and system PLL disabled; IRC enabled.
(2) System oscillator and system PLL enabled; IRC disabled.
(mA)
(μA)
I
I
DD
DD
40
30
20
10
Conditions: V
SYSAHBCLKCTRL register (SYSAHBCLKCTRL = 0x1F); all peripheral clocks disabled; internal
pull-up resistors disabled; BOD disabled; pin CAN_RXD pulled LOW externally.
Sleep mode: Typical supply current I
clock frequencies
Conditions: BOD disabled; all oscillators and analog blocks disabled in the PDSLEEPCFG register
(PDSLEEPCFG = 0x0000 18FF); pin CAN_RXD pulled LOW externally.
supply voltages V
8
6
4
2
0
0
−40
−40
All information provided in this document is subject to legal disclaimers.
DD
Rev. 2 — 3 December 2010
= 3.3 V; sleep mode entered from flash; all peripherals disabled in the
−15
−15
DD
10
10
DD
versus temperature for different system
32-bit ARM Cortex-M0 microcontroller
35
35
DD
versus temperature for different
48 MHz
36 MHz
24 MHz
12 MHz
LPC11Cx2/Cx4
(2)
(2)
(2)
(1)
60
60
temperature (°C)
temperature (°C)
3.6 V
3.3 V
2.0 V
1.8 V
© NXP B.V. 2010. All rights reserved.
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