ST7FLITEU05M3TR STMicroelectronics, ST7FLITEU05M3TR Datasheet - Page 57

• Manufacturer Part Number: ST7FLITEU05M3TR
• Description: IC MCU 8BIT 2K FLASH 8SOIC
• Manufacturer: STMicroelectronics
• Series: ST7r

Specifications of ST7FLITEU05M3TR

• Core Processor: ST7
• Core Size: 8-Bit
• Speed: 8MHz
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 5
• Program Memory Size: 2KB (2K x 8)
• Program Memory Type: FLASH
• Ram Size: 128 x 8
• Voltage - Supply (vcc/vdd): 2.4 V ~ 5.5 V
• Data Converters: A/D 5x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 8-SOIC (3.9mm Width)
• Processor Series: ST7FLITEUx
• Core: ST7
• Data Bus Width: 8 bit
• Data Ram Size: 128 B
• Interface Type: ICC
• Maximum Clock Frequency: 4 MHz
• Number Of Programmable I/os: 5
• Number Of Timers: 2
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: ST7FUS-PRIMER, ST7FLITE-SK/RAIS, ST7FLITU0-D/RAIS, STX-RLINK
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 5 Channel
• For Use With: 497-5858 - EVAL BOARD PLAYBACK ST7FLITE
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Connectivity: -
• Lead Free Status / Rohs Status: Details

ST7LITEU05 ST7LITEU09
mode. This connects f
f
Similarities with Halt mode
The following AWUFH mode behaviour is the same as normal Halt mode:
●
●
●
●
Figure 30. AWUF Halt timing diagram
AWU_RC
AWUFH interrupt
f
The MCU can exit AWUFH mode by means of any interrupt with exit from Halt
capability or a reset (see
When entering AWUFH mode, the I bit in the CC register is forced to 0 to enable
interrupts. Therefore, if an interrupt is pending, the MCU wakes up immediately.
In AWUFH mode, the main oscillator is turned off causing all internal processing to be
stopped, including the operation of the on-chip peripherals. None of the peripherals are
clocked except those which get their clock supply from another clock generator (such
as an external or auxiliary oscillator like the AWU oscillator).
The compatibility of watchdog operation with AWUFH mode is configured by the
WDGHALT option bit in the option byte. Depending on this setting, the HALT
instruction when executed while the watchdog system is enabled, can generate a
watchdog Reset.
f
AWU_RC
CPU
to be measured using the main oscillator clock as a reference timebase.
RUN MODE
AWU_RC
Section 9.4: Active-halt and Halt modes on page
to the input capture of the 8-bit lite timer, allowing the
HALT MODE
t
AWU
256 or 512 t
CPU
Power saving modes
RUN MODE
Clear
by software
53).
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