Z8F0113PJ005SG Zilog, Z8F0113PJ005SG Datasheet - Page 171
Z8F0113PJ005SG
Manufacturer Part Number
Z8F0113PJ005SG
Description
IC ENCORE MCU FLASH 1K 28DIP
Manufacturer
Zilog
Series
Encore!® XP®r
Datasheet
1.Z8F0223SB005SG.pdf
(247 pages)
Specifications of Z8F0113PJ005SG
Core Processor
Z8
Core Size
8-Bit
Speed
5MHz
Connectivity
IrDA, UART/USART
Peripherals
Brown-out Detect/Reset, LED, POR, PWM, WDT
Number Of I /o
24
Program Memory Size
1KB (1K x 8)
Program Memory Type
FLASH
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Oscillator Type
Internal
Operating Temperature
0°C ~ 70°C
Package / Case
28-DIP (0.600", 15.24mm)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Data Converters
-
Other names
269-3995
Z8F0113PJ005SG
Z8F0113PJ005SG
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On-Chip Debugger Control Register Definitions
PS024314-0308
OCD Control Register
•
•
•
•
The OCD Control register controls the state of the OCD. This register is used to enter or
exit DEBUG mode and to enable the
Series device.
Read Program Memory CRC (0EH)—The Read Program Memory Cyclic Redundan-
cy Check (CRC) command computes and returns the CRC of Program Memory using the
16-bit CRC-CCITT polynomial. If the device is not in DEBUG mode, this command re-
turns
from issuing of the command until the OCD returns the data. The OCD reads the Program
Memory, calculates the CRC value, and returns the result. The delay is a function of the
Program Memory size and is approximately equal to the system clock period multiplied
by the number of bytes in the Program Memory.
DBG
DBG
DBG
Step Instruction (10H)—The Step Instruction command steps one assembly instruction
at the current Program Counter (PC) location. If the device is not in DEBUG mode or the
Flash Read Protect Option bit is enabled, the OCD ignores this command.
DBG
Stuff Instruction (11H)—The Stuff Instruction command steps one assembly instruction
and allows specification of the first byte of the instruction. The remaining 0-4 bytes of the
instruction are read from Program Memory. This command is useful for stepping over in-
structions where the first byte of the instruction has been overwritten by a Breakpoint. If
the device is not in DEBUG mode or the Flash Read Protect Option bit is enabled, the
OCD ignores this command.
DBG
DBG
Execute Instruction (12H)—The Execute Instruction command allows sending an
entire instruction to be executed to the eZ8 CPU. This command can also step over break-
points. The number of bytes to send for the instruction depends on the opcode. If the device
is not in DEBUG mode or the Flash Read Protect Option bit is enabled, this command
reads and discards one byte.
DBG
DBG
FFFFH
←
→
→
←
←
←
←
←
0EH
CRC[15:8]
CRC[7:0]
10H
11H
opcode[7:0]
12H
1-5 byte opcode
for the CRC value. Unlike most other OCD Read commands, there is a delay
BRK
instruction. It also resets Z8 Encore! XP
Z8 Encore! XP
Product Specification
®
On-Chip Debugger
F0823 Series
®
F0823
161
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