Z8F0113PJ005SG Zilog, Z8F0113PJ005SG Datasheet - Page 90
Z8F0113PJ005SG
Manufacturer Part Number
Z8F0113PJ005SG
Description
IC ENCORE MCU FLASH 1K 28DIP
Manufacturer
Zilog
Series
Encore!® XP®r
Datasheet
1.Z8F0223SB005SG.pdf
(247 pages)
Specifications of Z8F0113PJ005SG
Core Processor
Z8
Core Size
8-Bit
Speed
5MHz
Connectivity
IrDA, UART/USART
Peripherals
Brown-out Detect/Reset, LED, POR, PWM, WDT
Number Of I /o
24
Program Memory Size
1KB (1K x 8)
Program Memory Type
FLASH
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Oscillator Type
Internal
Operating Temperature
0°C ~ 70°C
Package / Case
28-DIP (0.600", 15.24mm)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Data Converters
-
Other names
269-3995
Z8F0113PJ005SG
Z8F0113PJ005SG
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Table 49. Timer 0–1 High Byte Register (TxH)
Table 50. Timer 0–1 Low Byte Register (TxL)
Timer Control Register Definitions
BITS
FIELD
RESET
R/W
ADDR
BITS
FIELD
RESET
R/W
ADDR
PS024314-0308
Timer 0–1 High and Low Byte Registers
Timer Reload High and Low Byte Registers
R/W
R/W
7
0
7
0
The Timer 0–1 High and Low Byte (TxH and TxL) registers
contain the current 16-bit timer count value. When the timer is enabled, a read from TxH
causes the value in TxL to be stored in a temporary holding register. A read from TxL
always returns this temporary register when the timers are enabled. When the timer is dis-
abled, reads from the TxL reads the register directly.
Writing to the Timer High and Low Byte registers while the timer is enabled is not recom-
mended. There are no temporary holding registers available for write operations, so simul-
taneous 16-bit writes are not possible. If either the Timer High or Low Byte registers are
written during counting, the 8-bit written value is placed in the counter (High or Low
Byte) at the next clock edge. The counter continues counting from the new value.
TH and TL—Timer High and Low Bytes
These 2 bytes, {TH[7:0], TL[7:0]}, contain the current 16-bit timer count value
The Timer 0–1 Reload High and Low Byte (TxRH and TxRL) registers
Table
Reload High Byte register are stored in a temporary holding register. When a write to the
Timer Reload Low Byte register occurs, the temporary holding register value is written to
the Timer High Byte register. This operation allows simultaneous updates of the 16-bit
Timer Reload value.
52) store a 16-bit Reload value, {TRH[7:0], TRL[7:0]}. Values written to the Timer
R/W
R/W
6
0
6
0
R/W
R/W
5
0
5
0
R/W
R/W
4
0
4
0
F00H, F08H
F01H, F09H
TH
TL
R/W
R/W
3
0
3
0
Z8 Encore! XP
R/W
R/W
2
0
2
0
(Table 49
Product Specification
R/W
R/W
and
1
0
1
0
(Table 51
®
F0823 Series
Table
50)
R/W
R/W
and
0
0
0
1
Timers
80
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