ST7FLITE39F2M3TR STMicroelectronics, ST7FLITE39F2M3TR Datasheet - Page 64
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ST7FLITE39F2M3TR
Manufacturer Part Number
ST7FLITE39F2M3TR
Description
IC MCU 8BIT 8K FLASH 20SOIC
Manufacturer
STMicroelectronics
Series
ST7r
Datasheet
1.ST7FLITE35F2M6TR.pdf
(173 pages)
Specifications of ST7FLITE39F2M3TR
Core Processor
ST7
Core Size
8-Bit
Speed
16MHz
Connectivity
LINSCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
15
Program Memory Size
8KB (8K x 8)
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
384 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 7x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
20-SOIC (7.5mm Width)
For Use With
497-8406 - BOARD STF20NM50FD/STF7LITE39BF2497-8403 - BOARD DEMO STCC08 AC SW DETECTOR497-5858 - EVAL BOARD PLAYBACK ST7FLITE497-5049 - KIT STARTER RAISONANCE ST7FLITE
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ST7FLITE39F2M3TR
Manufacturer:
ST
Quantity:
20 000
- Current page: 64 of 173
- Download datasheet (3Mb)
ST7LITE3xF2
DUAL 12-BIT AUTORELOAD TIMER 3 (Cont’d)
■
Pulses that last between 8µs and 2s can be meas-
ured with an accuracy of 4µs if f
following conditions:
– The 12-bit AT3 Timer is clocked by the Lite Timer
– The ICS bit in the ATCSR2 register is set so that
Figure 44. Long Range Input Capture Block Diagram
Notes:
1. Since the input capture flags (ICF) for both tim-
ers (AT3 Timer and LT Timer) are set when signal
transition occurs, software must mask one inter-
rupt by clearing the corresponding ICIE bit before
setting the ICS bit.
2. If the ICS bit changes (from 0 to 1 or from 1 to
0), a spurious transition might occur on the input
capture signal because of different values on LTIC
and ATIC. To avoid this situation, it is recommend-
ed to do as follows:
– First, reset both ICIE bits.
– Then set the ICS bit.
– Reset both ICF bits.
64/173
1
ATIC
LTIC
(RTC pulse: CK[1:0] = 01 in the ATCSR register)
the LTIC pin is used to trigger the AT3 Timer cap-
ture.
Long input capture
ICS
1
0
f
LTIMER
f
OFF
cpu
f
OSC/32
LTICR
OSC
CNTR1
ATR1
ATICR
12-bit Input Capture Register
12-bit AutoReload Register
8-bit Input Capture Register
= 8MHz in the
8-bit Timebase Counter1
12-bit Upcounter1
– The signal to be captured is connected to LTIC
– Input Capture registers LTICR, ATICRH and
This configuration allows to cascade the Lite Timer
and the 12-bit AT3 Timer to get a 20-bit input cap-
ture value. Refer to
– And then set the ICIE bit of desired interrupt.
3. How to compute a pulse length with long input
capture feature.
As both timers are used, computing a pulse length
is not straight-forward. The procedure is as fol-
lows:
– At the first input capture on the rising edge of the
Refer to
pin
ATICRL are read
pulse, we assume that values in the registers are
as follows:
LTICR = LT1
ATICRH = ATH1
ATICRL = ATL1
Hence ATICR1 [11:0] = ATH1 & ATL1
12-Bit ARTIMER
LITE TIMER
Figure 45 on page
Figure
8 LSB bits
12 MSB bits
44.
65.
20
cascaded
bits
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