ST7FOXK1T6 STMicroelectronics, ST7FOXK1T6 Datasheet - Page 136
ST7FOXK1T6
Manufacturer Part Number
ST7FOXK1T6
Description
IC MCU 8BIT 1V FLASH MEM 32LQFP
Manufacturer
STMicroelectronics
Series
ST7r
Datasheet
1.ST7FOXF1M6.pdf
(226 pages)
Specifications of ST7FOXK1T6
Core Processor
ST7
Core Size
8-Bit
Speed
8MHz
Connectivity
I²C
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
24
Program Memory Size
4KB (4K x 8)
Program Memory Type
FLASH
Ram Size
384 x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 10x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
32-LQFP
Processor Series
ST7FOXx
Core
ST7
Data Bus Width
8 bit
Data Ram Size
384 B
Interface Type
I2C
Maximum Clock Frequency
8 MHz
Number Of Programmable I/os
24
Number Of Timers
4
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Development Tools By Supplier
ST7FLITE-SK/RAIS, STX-RLINK
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 1 Channel
For Use With
497-5049 - KIT STARTER RAISONANCE ST7FLITE
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Details
Other names
497-6336
Available stocks
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Price
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Part Number:
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On-chip peripherals
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Bit 4 = ICF2 Input capture flag 2
Bit 3 = OCF2 Output compare flag 2
Bit 2 = TIMD Timer disable
Bits 1:0 = Reserved, must be kept cleared
Timer A Input capture 1 high register (TAIC1HR)
Reset value: undefined
This is an 8-bit read-only register that contains the high part of the counter value (transferred
by the input capture 1 event).
Timer A Input capture 1 low register (TAIC1LR)
Reset value: undefined
This is an 8-bit read-only register that contains the low part of the counter value (transferred
by the input capture 1 event).
MSB
MSB
0: No input capture (reset value)
1: An input capture has occurred on the ICAP2 pin. To clear this bit, first read the SR
register, then read or write the low byte of the IC2R (IC2LR) register.
0: No match (reset value)
1: The content of the free running counter has matched the content of the OC2R
register. To clear this bit, first read the SR register, then read or write the low byte of
the OC2R (OC2LR) register.
This bit is set and cleared by software. When set, it freezes the timer prescaler and
counter and disables the output functions (OCMP1 and OCMP2 pins) to reduce power
consumption. Access to the timer registers is still available, allowing the timer
configuration to be changed while it is disabled.
0: Timer enabled
1: Timer prescaler, counter and outputs disabled
7
7
Read Only
Read Only
ST7FOXF1, ST7FOXK1, ST7FOXK2
LSB
LSB
0
0
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