Z8F0412SJ020SG Zilog, Z8F0412SJ020SG Datasheet - Page 114

IC ENCORE MCU FLASH 4K 28SOIC

Z8F0412SJ020SG

Manufacturer Part Number
Z8F0412SJ020SG
Description
IC ENCORE MCU FLASH 4K 28SOIC
Manufacturer
Zilog
Series
Encore!® XP®r
Datasheet

Specifications of Z8F0412SJ020SG

Core Processor
Z8
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, IrDA, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
19
Program Memory Size
4KB (4K x 8)
Program Memory Type
FLASH
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Oscillator Type
Internal
Operating Temperature
0°C ~ 70°C
Package / Case
28-SOIC (7.5mm Width)
Processor Series
Z8F041xx
Core
eZ8
Data Bus Width
8 bit
Data Ram Size
1 KB
Interface Type
I2C, SPI, UART
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
19
Number Of Timers
2
Operating Supply Voltage
2.7 V to 3.6 V
Maximum Operating Temperature
+ 70 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
0 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Data Converters
-
Lead Free Status / Rohs Status
 Details
Other names
269-4107
Z8F0412SJ020SG

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
Z8F0412SJ020SG
Manufacturer:
ZILOG
Quantity:
20 000
Table 53. UART Receive Data Register (U0RXD)
Table 54. UART Status 0 Register (U0STAT0)
PS022517-0508
BITS
FIELD
RESET
R/W
ADDR
BITS
FIELD
RESET
R/W
ADDR
UART Receive Data Register
UART Status 0 Register
RDA
7
7
Data bytes received through the RXDx pin are stored in the UART Receive Data Register
(Table
with the Write-only UART Transmit Data Register.
RXD—Receive Data
UART receiver data byte from the RXDx pin
The UART Status 0 and Status 1 registers
the current UART operating configuration and status.
RDA—Receive Data Available
This bit indicates that the UART Receive Data Register has received data. Reading the
UART Receive Data Register clears this bit.
0 = The UART Receive Data Register is empty.
1 = There is a byte in the UART Receive Data Register.
PE—Parity Error
This bit indicates that a parity error has occurred. Reading the UART Receive Data Regis-
ter clears this bit.
0 = No parity error has occurred.
1 = A parity error has occurred.
OE—Overrun Error
This bit indicates that an overrun error has occurred. An overrun occurs when new data is
received and the UART Receive Data Register has not been read. If the RDA bit is reset to
53). The Read-only UART Receive Data Register shares a Register File address
PE
6
6
OE
0
5
5
FE
4
4
F40H
F41H
RXD
R
R
X
(Table 54
BRKD
3
3
Universal Asynchronous Receiver/Transmitter
and
Z8 Encore! XP
TDRE
Table 55
2
2
Product Specification
1
on page 102) identify
TXE
1
1
®
F0822 Series
CTS
X
0
0
101

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