Z8F0412SJ020SG Zilog, Z8F0412SJ020SG Datasheet - Page 37

• Manufacturer Part Number: Z8F0412SJ020SG
• Description: IC ENCORE MCU FLASH 4K 28SOIC
• Manufacturer: Zilog
• Series: Encore!® XP®r

Specifications of Z8F0412SJ020SG

• Core Processor: Z8
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: I²C, IrDA, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 19
• Program Memory Size: 4KB (4K x 8)
• Program Memory Type: FLASH
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Oscillator Type: Internal
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 28-SOIC (7.5mm Width)
• Processor Series: Z8F041xx
• Core: eZ8
• Data Bus Width: 8 bit
• Data Ram Size: 1 KB
• Interface Type: I2C, SPI, UART
• Maximum Clock Frequency: 20 MHz
• Number Of Programmable I/os: 19
• Number Of Timers: 2
• Operating Supply Voltage: 2.7 V to 3.6 V
• Maximum Operating Temperature: + 70 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: 0 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Details
• Other names: 269-4107; Z8F0412SJ020SG

PS022517-0508
I2C Control
I2CCTL (F52H - Read/Write)
D7 D6 D5 D4 D3 D2 D1 D0
Z8 Encore! XP
I2C Signal Filter Enable
enabled
signals
Flush Data
Send NAK
received
Enable TDRE Interrupts
interrupt when
empty
when the I2C
empty
Baud Rate Generator
by I2C
interrupt when
Send STOP Condition
condition after
complete
after data
Send Start Condition
Condition
I2C Enable
1 = Send NAK after next byte
0 = Digital filtering disabled
1 = Low-pass digital filters
0 = No effect
1 = Clears I2C Data register
0 = Do not send NAK
0 = Do not generate an
1 = Generate an interrupt
0 = Interrupts behave as set
1 = BRG generates an
0 = Do not issue STOP
1 = Issue STOP condition
0 = Do not send Start
1 = Send Start Condition
0 = I2C is disabled
1 = I2C is enabled
Product Specification
the I2C Data register is
Transmit Data register is
control
it counts down to zero
data transmission is
transmission is complete
on SDA and SCL input
from slave
Control Register Summary
®
F0822 Series
24