Z8F0412SJ020SG Zilog, Z8F0412SJ020SG Datasheet - Page 191

• Manufacturer Part Number: Z8F0412SJ020SG
• Description: IC ENCORE MCU FLASH 4K 28SOIC
• Manufacturer: Zilog
• Series: Encore!® XP®r

Specifications of Z8F0412SJ020SG

• Core Processor: Z8
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: I²C, IrDA, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 19
• Program Memory Size: 4KB (4K x 8)
• Program Memory Type: FLASH
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Oscillator Type: Internal
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 28-SOIC (7.5mm Width)
• Processor Series: Z8F041xx
• Core: eZ8
• Data Bus Width: 8 bit
• Data Ram Size: 1 KB
• Interface Type: I2C, SPI, UART
• Maximum Clock Frequency: 20 MHz
• Number Of Programmable I/os: 19
• Number Of Timers: 2
• Operating Supply Voltage: 2.7 V to 3.6 V
• Maximum Operating Temperature: + 70 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: 0 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Details
• Other names: 269-4107; Z8F0412SJ020SG

Table 93. On-Chip Debugger Commands (Continued)
PS022517-0508
Debug Command
Execute Instruction
Reserved
In the following bulleted list of OCD Commands, data and commands sent from the host to
the OCD are identified by ’DBG ← Command/Data’. Data sent from the OCD back to the
host is identified by ’DBG → Data’
•
•
•
•
•
Read OCD Revision (00H)
version of the OCD. If OCD commands are added, removed, or changed, this revision
number changes.
Write OCD Counter Register (01H)
writes the data that follows to the OCDCNTR register. If the device is not in DEBUG
mode, the data is discarded.
Read OCD Status Register (02H)
the OCDSTAT register.
Read OCD Counter Register (03H)
count system clock cycles in between Breakpoints, generate a BRK when it counts
down to zero, or generate a BRK when its value matches the Program Counter. Since
this register is really a down counter, the returned value is inverted when this register
is read so the returned result appears to be an up counter. If the device is not in
DEBUG mode, this command returns FFFFH.
Write OCD Control Register (04H)
writes the data that follows to the OCDCTL register. When the Read Protect Option
Bit is enabled, the DBGMODE bit (OCDCTL[7]) can only be set to 1, it cannot be
cleared to 0 and the only method of putting the device back into normal operating
mode is to reset the device.
DBG ← 00H
DBG → OCDREV[15:8] (Major revision number)
DBG → OCDREV[7:0] (Minor revision number)
DBG ← 01H
DBG ← OCDCNTR[15:8]
DBG ← OCDCNTR[7:0]
DBG ← 02H
DBG → OCDSTAT[7:0]
DBG ← 03H
DBG → ~OCDCNTR[15:8]
DBG → ~OCDCNTR[7:0]
Command
Byte
13H - FFH
12H
Enabled when
NOT in DEBUG
mode?
—The Read OCD Revision command determines the
-
-
—The Read OCD Status Register command reads
—The Write OCD Control Register command
—The Write OCD Counter Register command
—The OCD Counter Register can be used to
Disabled by
Read Protect Option Bit
Z8 Encore! XP
Product Specification
Disabled
-
®
On-Chip Debugger
F0822 Series
178