ST7FLITE35M6TR STMicroelectronics, ST7FLITE35M6TR Datasheet - Page 43
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ST7FLITE35M6TR
Manufacturer Part Number
ST7FLITE35M6TR
Description
IC MCU 8BIT 8K FLASH 20SOIC
Manufacturer
STMicroelectronics
Series
ST7r
Datasheet
1.ST7FLITE35F2M6TR.pdf
(173 pages)
Specifications of ST7FLITE35M6TR
Core Processor
ST7
Core Size
8-Bit
Speed
8MHz
Connectivity
LINSCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
15
Program Memory Size
8KB (8K x 8)
Program Memory Type
FLASH
Ram Size
384 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 7x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
20-SOIC (7.5mm Width)
Processor Series
ST7FLITE3x
Core
ST7
Data Bus Width
8 bit
Development Tools By Supplier
ST7FLITE-SK/RAIS, ST7MDT10-DVP3, ST7MDT10-EMU3, STX-RLINK
For Use With
497-5858 - EVAL BOARD PLAYBACK ST7FLITE
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Details
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- Download datasheet (3Mb)
POWER SAVING MODES (Cont’d)
Figure 26. ACTIVE-HALT Timing Overview
Figure 27. ACTIVE-HALT Mode Flow-chart
Notes:
1. This delay occurs only if the MCU exits ACTIVE-
HALT mode by means of a RESET.
2. Peripherals clocked with an external clock
source can still be active.
3. Only the RTC1 interrupt and some specific inter-
rupts can exit the MCU from ACTIVE-HALT mode.
Refer to Table 6, “Interrupt Mapping,” on page 36
for more details.
4. Before servicing an interrupt, the CC register is
pushed on the stack. The I bit of the CC register is
set during the interrupt routine and cleared when
the CC register is popped.
[Active Halt Enabled]
INSTRUCTION
(AWUCSR.AWUEN=0)
HALT INSTRUCTION
RUN
(Active Halt enabled)
N
HALT
INTERRUPT
ACTIVE
HALT
Y
256 OR 4096 CPU
CYCLE DELAY
INTERRUPT
3)
RESET
OR SERVICE INTERRUPT
FETCH RESET VECTOR
CLOCK CYCLE
OR
OSCILLATOR
PERIPHERALS
OSCILLATOR
PERIPHERALS
OSCILLATOR
PERIPHERALS
CPU
I BIT
CPU
I BIT
CPU
I BIT
N
256 OR 4096 CPU
RESET
Y
1)
VECTOR
FETCH
RUN
2)
2)
DELAY
OFF
OFF
OFF
ON
ON
ON
X
ON
ON
ON
X
0
4)
4)
9.6 AUTO WAKE UP FROM HALT MODE
Auto Wake Up From Halt (AWUFH) mode is simi-
lar to Halt mode with the additional of an internal
RC oscillator for wake-up. Compared to ACTIVE-
HALT mode, AWUFH has lower power consump-
tion (the main clock is not kept running), but there
is no accurate realtime clock available.
It is entered by executing the HALT instruction
when the AWUEN bit in the AWUCSR register has
been set.
Figure 28. AWUFH Mode Block Diagram
As soon as HALT mode is entered, and if the
AWUEN bit has been set in the AWUCSR register,
the AWU RC oscillator provides a clock signal
(f
er and a programmable prescaler controlled by the
AWUPR register. The output of this prescaler pro-
vides the delay time. When the delay has elapsed
the AWUF flag is set by hardware and an interrupt
wakes-up the MCU from Halt mode. At the same
time the main oscillator is immediately turned on
and a 256 cycle delay is used to stabilize it. After
this start-up delay, the CPU resumes operation by
servicing the AWUFH interrupt. The AWU flag and
its associated interrupt are cleared by software
reading the AWUCSR register.
To compensate for any frequency dispersion of
the AWU RC oscillator, it can be calibrated by
measuring the clock frequency f
calculating the right prescaler value. Measurement
mode is enabled by setting the AWUM bit in the
AWUCSR register in Run mode. This connects
f
lad timer, allowing the f
using the main oscillator clock as a reference time-
base.
AWU_RC
AWU RC
32-KHz
AWU_RC
Oscillator
Oscillator
f
AWU_RC
divider
/64
to the input capture of the 12-bit Auto-Re-
). Its frequency is divided by a fixed divid-
AWUCK Opt bit
1
0
prescaler/1 .. 255
AWUFH
AWU_RC
Auto-Reload
Input Capture
to
AWU_RC
to be measured
ST7LITE3xF2
(ei0 source)
AWUFH
interrupt
and then
43/173
Timer
1
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