STM8S207RBT6TR STMicroelectronics, STM8S207RBT6TR Datasheet - Page 14

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STM8S207RBT6TR

Manufacturer Part Number
STM8S207RBT6TR
Description
MCU 8BIT 128K FLASH 64-LQFP
Manufacturer
STMicroelectronics
Series
STM8Sr
Datasheet

Specifications of STM8S207RBT6TR

Core Processor
STM8
Core Size
8-Bit
Speed
24MHz
Connectivity
I²C, IrDA, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
52
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Eeprom Size
2K x 8
Ram Size
6K x 8
Voltage - Supply (vcc/vdd)
2.95 V ~ 5.5 V
Data Converters
A/D 16x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-LQFP
Processor Series
STM8S20x
Core
STM8
3rd Party Development Tools
EWSTM8
Development Tools By Supplier
STICE-SYS001
For Use With
497-10592 - BOARD DAUGHTER FOR STM8S207/8497-10593 - KIT STARTER FOR STM8S207/8 SER497-8506 - BOARD EVAL FOR STM8S
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
STM8S207RBT6TR
Manufacturer:
STMicroelectronics
Quantity:
10 000
Part Number:
STM8S207RBT6TR
Manufacturer:
ST
0
Product overview
4.2
4.3
14/105
Single wire interface module (SWIM) and debug module (DM)
The single wire interface module and debug module permits non-intrusive, real-time in-
circuit debugging and fast memory programming.
SWIM
Single wire interface module for direct access to the debug module and memory
programming. The interface can be activated in all device operation modes. The maximum
data transmission speed is 145 bytes/ms.
Debug module
The non-intrusive debugging module features a performance close to a full-featured
emulator. Beside memory and peripherals, also CPU operation can be monitored in real-
time by means of shadow registers.
Interrupt controller
R/W to RAM and peripheral registers in real-time
R/W access to all resources by stalling the CPU
Breakpoints on all program-memory instructions (software breakpoints)
Two advanced breakpoints, 23 predefined configurations
Nested interrupts with three software priority levels
32 interrupt vectors with hardware priority
Up to 37 external interrupts on six vectors including TLI
Trap and reset interrupts
Doc ID 14733 Rev 11
STM8S207xx, STM8S208xx

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