STM8S207RBT6TR STMicroelectronics, STM8S207RBT6TR Datasheet - Page 79

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STM8S207RBT6TR

Manufacturer Part Number
STM8S207RBT6TR
Description
MCU 8BIT 128K FLASH 64-LQFP
Manufacturer
STMicroelectronics
Series
STM8Sr
Datasheet

Specifications of STM8S207RBT6TR

Core Processor
STM8
Core Size
8-Bit
Speed
24MHz
Connectivity
I²C, IrDA, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
52
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Eeprom Size
2K x 8
Ram Size
6K x 8
Voltage - Supply (vcc/vdd)
2.95 V ~ 5.5 V
Data Converters
A/D 16x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-LQFP
Processor Series
STM8S20x
Core
STM8
3rd Party Development Tools
EWSTM8
Development Tools By Supplier
STICE-SYS001
For Use With
497-10592 - BOARD DAUGHTER FOR STM8S207/8497-10593 - KIT STARTER FOR STM8S207/8 SER497-8506 - BOARD EVAL FOR STM8S
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
STM8S207RBT6TR
Manufacturer:
STMicroelectronics
Quantity:
10 000
Part Number:
STM8S207RBT6TR
Manufacturer:
ST
0
STM8S207xx, STM8S208xx
10.3.8
Table 42.
1. Values based on design simulation and/or characterization results, and not tested in production.
2. Min time is for the minimum time to drive the output and the max time is for the maximum time to validate the data.
3. Min time is for the minimum time to invalidate the output and the max time is for the maximum time to put the data in Hi-Z.
t
t
t
t
dis(SO)
t
w(SCKH)
t
w(SCKL)
a(SO)
1/t
su(NSS)
t
Symbol
t
t
t
h(NSS)
t
t
t
su(MI)
t
v(SO)
h(MO)
su(SI)
v(MO)
h(SO)
t
h(MI)
t
h(SI)
r(SCK)
f(SCK)
f
c(SCK)
SCK
(1)(2)
(1)
(1)(3)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
SPI serial peripheral interface
Unless otherwise specified, the parameters given in
performed under ambient temperature, f
conditions. t
Refer to I/O port characteristics for more details on the input/output alternate function
characteristics (NSS, SCK, MOSI, MISO).
SPI characteristics
SPI clock frequency
SPI clock rise and fall time
NSS setup time
NSS hold time
SCK high and low time
Data input setup time
Data input hold time
Data output access time
Data output disable time
Data output valid time
Data output valid time
Data output hold time
Parameter
MASTER
= 1/f
MASTER
Slave mode
Master mode
Slave mode
Slave mode
Slave mode (after enable edge)
Master mode (after enable edge)
Master mode
Slave mode
Capacitive load: C = 30 pF
Slave mode
Master mode
Slave mode
Master mode
Slave mode
Slave mode (after enable edge)
Master mode (after enable edge)
Doc ID 14733 Rev 11
.
Conditions
MASTER
frequency and V
Table 42
4 x t
t
SCK
are derived from tests
Min
MASTER
70
10
25
31
12
/2 - 15
0
5
5
7
DD
0
Electrical characteristics
supply voltage
t
3 x t
SCK
Max
10
25
/2 + 15
MASTER
75
30
6
79/105
Unit
MHz
ns

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