ST72F63BK2M1 STMicroelectronics, ST72F63BK2M1 Datasheet - Page 65

IC MCU 8BIT 8K FLASH 34-SOIC

ST72F63BK2M1

Manufacturer Part Number
ST72F63BK2M1
Description
IC MCU 8BIT 8K FLASH 34-SOIC
Manufacturer
STMicroelectronics
Series
ST7r
Datasheet

Specifications of ST72F63BK2M1

Core Processor
ST7
Core Size
8-Bit
Speed
8MHz
Connectivity
I²C, SCI, USB
Peripherals
DMA, LVD, POR, PWM, WDT
Number Of I /o
19
Program Memory Size
8KB (8K x 8)
Program Memory Type
FLASH
Ram Size
384 x 8
Voltage - Supply (vcc/vdd)
4 V ~ 5.5 V
Data Converters
A/D 12x8b
Oscillator Type
External
Operating Temperature
0°C ~ 70°C
Package / Case
34-SOIC (7.5mm Width)
Processor Series
ST72F6x
Core
ST7
Data Bus Width
8 bit
Data Ram Size
384 B
Interface Type
I2C, SCI
Maximum Clock Frequency
8 MHz
Number Of Programmable I/os
27
Number Of Timers
2 x 16 bit
Operating Supply Voltage
4 V to 5.5 V
Maximum Operating Temperature
+ 70 C
Mounting Style
SMD/SMT
Development Tools By Supplier
ST7MDTU3-EPB/US, ST72F63B-SK/RAIS, ST7MDTU3-EMU3, STX-RLINK
Minimum Operating Temperature
0 C
On-chip Adc
8 bit
For Use With
497-5521 - EVAL BOARD LOW SPEED USB
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details

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ST7263Bxx
Output Compare
In this section, the index, i, may be 1 or 2 because there are two output compare functions in
the 16-bit timer.
This function can be used to control an output waveform or indicate when a period of time
has elapsed.
When a match is found between the output Compare register and the free running counter,
the output compare function:
Two 16-bit registers output Compare register 1 (OC1R) and output Compare register 2
(OC2R) contain the value to be compared to the counter register each timer clock cycle.
Table 20.
These registers are readable and writable and are not affected by the timer hardware. A
reset event changes the OC
Timing resolution is one count of the free running counter: (
Procedure
To use the output compare function, select the following in the CR2 register:
1.
2.
3.
When a match is found between OCiR register and CR register:
The OC
the following formula:
Where:
Δ
f
CPU
t = Output compare period (in seconds)
Assigns pins with a programmable value if the OCiE bit is set
Sets a flag in the status register
Generates an interrupt if enabled
Set the OCiE bit if an output is needed then the OCMPi pin is dedicated to the output
compare i signal.
Select the timer clock (CC[1:0]) (see
Select the following in the CR1 register:
a)
b)
OCFi bit is set.
The OCMPi pin takes OLVLi bit value (OCMPi pin latch is forced low during reset).
A timer interrupt is generated if the OCIE bit is set in the CR1 register and the I bit is
cleared in the CC register (CC).
= CPU clock frequency (in hertz)
i
R register value required for a specific timing application can be calculated using
Select the OLVLi bit to applied to the OCMPi pins after the match occurs.
Set the OCIE bit to generate an interrupt if it is needed.
OCiR
OC/R register
i
R value to 8000h.
Doc ID 7516 Rev 8
Δ
MS Byte
OCiR =
OCiHR
Table
Δt
PRESC
24).
*
f
CPU
f
CPU/
CC[1:0]
).
On-chip peripherals
LS Byte
OCiLR
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