ST7FDALIF2M6TR STMicroelectronics, ST7FDALIF2M6TR Datasheet - Page 93

• Manufacturer Part Number: ST7FDALIF2M6TR
• Description: IC MCU 8BIT 8K FLASH 20-SOIC
• Manufacturer: STMicroelectronics
• Series: ST7r

Specifications of ST7FDALIF2M6TR

• Core Processor: ST7
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: DALI, SPI
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 15
• Program Memory Size: 8KB (8K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 256 x 8
• Ram Size: 384 x 8
• Voltage - Supply (vcc/vdd): 2.4 V ~ 5.5 V
• Data Converters: A/D 7x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 20-SOIC (7.5mm Width)
• Processor Series: ST7DALI
• Core: ST7
• Data Bus Width: 8 bit
• Data Ram Size: 384 B
• Interface Type: DALI, SPI
• Maximum Clock Frequency: 8 MHz
• Number Of Programmable I/os: 15
• Number Of Timers: 3
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: ST7FLITE-SK/RAIS, ST7DALI-EVAL, ST7MDT10-DVP3, ST7MDT10-EMU3, STX-RLINK
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 7 Channel / 13 bit, 7 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

ST7DALIF2
16.6
16.6.1
16.6.2
16.6.3
16.7
If the software asks the DCM to receive a "forward frame", the software must switch the
DCM to Receive state by clearing the RTS bit and setting the RTA bit in the DCMCR register
during the interrupt routine.
If the ITF interrupt flag is set in the DCMCSR register, the software must set the RTA bit in
the DCMCR register to allow the DCM to perform the next DALI signal reception or
transmission.
The DALIIN signal is always taken into account by the 4-bit pre-shifter.
Special functions
Forced transmission (test mode)
The DCM must receive a "forward frame" before sending back a "backward frame". But it is
possible to force the DCM into Transmit state by setting the FTS bit in the DCMCR register.
The DCMBD register will be shifted out in DALI format, the Most Significant Bit-first.
Preferably before forcing the DCM into Transmit state, the user should reset/set the DCME
bit in the DCMCR register. An interrupt flag will be generated after a forced transmission (the
ITF bit in the DCMCSR register).
Procedure:
Normal transmission
After the "forward frame" reception, the software must write the backward data byte to the
DCMBD register and set both the RTS and RTA bits in the DCMCR register to start the
transmission.
It is not possible to send a backward frame just after having sent a backward frame (see
DALI standard protocol).
DCM enable
The user can enable or disable the DCM by writing the DCME bit in the DCMCR register.
This bit is also used to reset the entire internal finite state machine.
DALI interface failure
If the DALI input signal is set to low level for a 2-bit period (1.66 ms), then the DCM
generates an error flag by setting the EF bit in the DCMCSR register. This bit can be cleared
by reading the DCMCSR register. The interface failure is detected if the DCM is in Receive
state only.
– Reset the DCME bit in the DCMCR register.
– Write the backward value in the DCMBD register.
– Set both the DCME and the FTS bits in the DCMCR register.
– When an interrupt is generated (end of transmission, the ITF bit is set in the
– To return to normal DALI communications, reset/set the DCME bit and reset the FTS
DCMCSR register), set the RTA bit in the DCMCR register to re-start a transmission.
bit in the DCMCR register.
DALI communication module
93/171