Z86E7216PSG Zilog, Z86E7216PSG Datasheet - Page 32

IC 16K OTP ZIRC 40-DIP

Z86E7216PSG

Manufacturer Part Number
Z86E7216PSG
Description
IC 16K OTP ZIRC 40-DIP
Manufacturer
Zilog
Series
Z8®r
Datasheet

Specifications of Z86E7216PSG

Core Processor
Z8
Core Size
8-Bit
Speed
16MHz
Peripherals
LVD, POR, WDT
Number Of I /o
31
Program Memory Size
16KB (16K x 8)
Program Memory Type
OTP
Ram Size
748 x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
0°C ~ 70°C
Package / Case
40-DIP (0.620", 15.75mm)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Data Converters
-
Connectivity
-
Z86E72/73
OTP Microcontroller
28
Port 1 (P17–P10)
Port 1 is a multiplexed Address (A7–A0) and Data (D7–D0), CMOS-compatible
®
port. Port 1 is dedicated to the ZiLOG ZBus
-compatible memory interface. The
operations of Port 1 are supported by the Address Strobe (/AS) and Data Strobe
(/DS) lines and by the Read/Write (R//W) and Data Memory (/DM) control lines.
Data memory read/write operations are done through this port. If more than 256
external locations are required, Port 0 outputs the additional lines.
Port 1 can be placed in the high-impedance state along with Port 0, /AS, /DS, and
R//W, allowing the Z86E7X to share common resources in multiprocessor and
DMA applications. Port 1 can also be configured for standard port output mode.
See
Figure
15.
PS008704-0507

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