Z86E7216PSG Zilog, Z86E7216PSG Datasheet - Page 66

IC 16K OTP ZIRC 40-DIP

Z86E7216PSG

Manufacturer Part Number
Z86E7216PSG
Description
IC 16K OTP ZIRC 40-DIP
Manufacturer
Zilog
Series
Z8®r
Datasheet

Specifications of Z86E7216PSG

Core Processor
Z8
Core Size
8-Bit
Speed
16MHz
Peripherals
LVD, POR, WDT
Number Of I /o
31
Program Memory Size
16KB (16K x 8)
Program Memory Type
OTP
Ram Size
748 x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
0°C ~ 70°C
Package / Case
40-DIP (0.620", 15.75mm)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Data Converters
-
Connectivity
-
PS008704-0507
T16_OUT
CTR1, D2
Interrupts
Starting Ping-Pong Mode
First, make sure both counter/timers are not running. Then set T8 into Single-
Pass Mode (CTR0 D6), set T16 into Single-Pass Mode (CTR2 D6), and set Ping-
Pong Mode (CTR1 D2, D3). These instructions do not have to be in any particular
order. Finally, start Ping-Pong Mode by enabling either T8 (CTR0 D7) or T16
(CTR2 D7).
During Ping-Pong Mode
The enable bits of T8 and T16 (CTR0 D7, CTR2 D7) are alternately set and
cleared by hardware. The time-out bits (CTR0 D5, CTR2 D5) are set every time
the counter/timers reach the terminal count.
Output Circuit
Figure 36
The Z86E7X has five different interrupts. The interrupts are maskable and priori-
tized, as shown in
sources are claimed by Port 3 lines P33–P31 and the remaining two by the
counter/timers (see
enables or disables the five interrupt requests.
CTR1 D3
T8_OUT
MUX
shows the output circuit.
Figure
Table
Figure 36. Output Circuit
AND/OR/NOR/NAND
37. The five sources are divided as follows: three
26). The Interrupt Mask Register globally or individually
CTR1 D5,D4
Logic
P34_INTERNAL
P35_INTERNAL
P36_INTERNAL
CTR0 D0
CTR1 D6
CTR2 D0
OTP Microcontroller
MUX
MUX
MUX
P34_EXT
P35_EXT
P36_EXT
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