Z86E7216PSG Zilog, Z86E7216PSG Datasheet - Page 80

• Manufacturer Part Number: Z86E7216PSG
• Description: IC 16K OTP ZIRC 40-DIP
• Manufacturer: Zilog
• Series: Z8®r

Specifications of Z86E7216PSG

• Core Processor: Z8
• Core Size: 8-Bit
• Speed: 16MHz
• Peripherals: LVD, POR, WDT
• Number Of I /o: 31
• Program Memory Size: 16KB (16K x 8)
• Program Memory Type: OTP
• Ram Size: 748 x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Oscillator Type: Internal
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 40-DIP (0.620", 15.75mm)
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Data Converters: -
• Connectivity: -

EPROM Programming
PS008704-0507
User/Test Mode
Device Pin #
User Modes
EPROM Read
Program
Program Verify
RC Option
Margin Read
Shadow Row Rd
Shadow Row Prg V
Shadow Row Ver V
Shadow Col Rd
Shadow Col Prg
Shadow Col Ver
Page Prg 2 Byte
Page Prg 4 Byte
Page Prg 8 Byte
Page Prg 16 Byte V
Notes:
V
V
V
V
V
XX = Irrelevant
I
I
PP
CC
VA
PP
H
IH
IL
1. All test modes are entered by first setting up the corresponding test
= 12.5 V ± 0. 5 V
= 0 V
during programming = 40 mA maximum
during programming, verify, or read = 40 mA maximum.
= 3 V
address and then latching the address by bringing the /OE to V
to V
= Variable from V
= 12.5 V ± 0.5 V
IL
, except for the margin read which requires /OE to be kept at V
Table 31
Table 31. Programming and Test Modes
P33
V
V
V
V
V
V
V
V
V
V
V
V
V
PP
CC
PP
PP
PP
VA
CC
PP
PP
CC
PP
PP
PP
PP
PP
PP
CC
to V
describes the programming and test modes.
P32
EPM
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
H
CC
CC
CC
H
H
H
H
H
H
H
H
H
H
H
PP
Device Pins
Pref1
/CE
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
IL
IL
IL
H
IL
IL
IL
IL
IL
IL
IL
IL
IL
IL
IL
P31
/OE
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
IL
IH
IL
IH
H
IL
IH
IL
IL
IH
IL
IH
IH
IH
IH
P20
/PGM
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
IH
IL
IH
IL
IH
IH
IL
IH
IH
IL
IH
IL
IL
IL
IL
H
Addr
Addr
Addr
Addr
XX
Addr
COL
COL
COL
ROW
ROW
ROW
TBD
TBD
TBD
TBD
and then
H
.
V
3.0 V
6.0 V
6.0 V
6.0 V
6.0 V
3.0 V
6.0 V
6.0 V
3.0 V
6.0 V
6.0 V
6.0 V
6.0 V
6.0 V
6.0 V
CC
Port 1
CNFG
DATA
Out
In
Out
XX
Out
Out
In
Out
Out
In
Out
In
In
In
In
OTP Microcontroller
Test
ADDR
A0–A3 Note
XX
XX
XX
XX
00
01
01
01
02
03
02
04
05
06
07
1
1
1
1
1
1
1
1
1
1
1
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