CY8CLED16P01-28PVXIT Cypress Semiconductor Corp, CY8CLED16P01-28PVXIT Datasheet - Page 33

IC PLC PSOC CMOS LED 16CH 28SSOP

CY8CLED16P01-28PVXIT

Manufacturer Part Number
CY8CLED16P01-28PVXIT
Description
IC PLC PSOC CMOS LED 16CH 28SSOP
Manufacturer
Cypress Semiconductor Corp
Series
PowerPSoC® CY8CLEDr
Datasheet

Specifications of CY8CLED16P01-28PVXIT

Package / Case
28-SSOP
Core Processor
M8C
Core Size
8-Bit
Speed
24MHz
Connectivity
I²C, IrDA, SPI, UART/USART
Peripherals
LED, PLC, POR, PWM, WDT
Number Of I /o
24
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
4.75 V ~ 5.25 V
Data Converters
A/D 4x14b; D/A 4x9b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Operating Supply Voltage
4.75 V to 5.25 V
Maximum Supply Current
8 mA
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details
10.4.3 AC Operational Amplifier Specifications
Table 10-15
≤ T
Settling times, slew rates, and gain bandwidth are based on the Analog Continuous Time PSoC block.
Table 10-15. 5V AC Operational Amplifier Specifications
When bypassed by a capacitor on P2[4], the noise of the analog ground signal distributed to each block is reduced by a factor of up
to 5 (14 dB). This is at frequencies above the corner frequency defined by the on-chip 8.1k resistance and the external capacitor.
Document Number: 001-49263 Rev. *E
T
T
SR
SR
BW
E
Symbol
ROA
SOA
NOA
A
ROA
FOA
OA
≤ 85 ° C. Typical parameters apply to 5V at 25 ° C and are for design guidance only.
Rising Settling Time to 0.1% for a 1V Step (10
pF load, Unity Gain)
Power = Low, Opamp Bias = Low
Power = Medium, Opamp Bias = High
Power = High, Opamp Bias = High
Falling Settling Time to 0.1% for a 1V Step (10
pF load, Unity Gain)
Power = Low, Opamp Bias = Low
Power = Medium, Opamp Bias = High
Power = High, Opamp Bias = High
Rising Slew Rate (20% to 80%) of a 1V Step
(10 pF load, Unity Gain)
Power = Low, Opamp Bias = Low
Power = Medium, Opamp Bias = High
Power = High, Opamp Bias = High
Falling Slew Rate (20% to 80%) of a 1V Step
(10 pF load, Unity Gain)
Power = Low, Opamp Bias = Low
Power = Medium, Opamp Bias = High
Power = High, Opamp Bias = High
Gain Bandwidth Product
Power = Low, Opamp Bias = Low
Power = Medium, Opamp Bias = High
Power = High, Opamp Bias = High
Noise at 1 kHz (Power = Medium, Opamp Bias
= High)
lists guaranteed maximum and minimum specifications for the voltage and temperature ranges: 4.75V to 5.25V and -40 ° C
Description
Voltage
Output
GPIO
Pin
90%
10%
Figure 10-6. GPIO Timing Diagram
TRiseS
TRiseF
0.15
0.01
0.75
Min
1.7
6.5
0.5
4.0
3.1
5.4
Typ
100
TFallF
TFallS
Max
0.72
0.62
0.92
0.72
3.9
5.9
nV/rt-Hz
Units
V/ μ s
V/ μ s
V/ μ s
V/ μ s
V/ μ s
V/ μ s
MHz
MHz
MHz
μ s
μ s
μ s
μ s
μ s
μ s
CY8CLED16P01
Notes
Page 33 of 46
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