CY8CLED16P01-28PVXIT Cypress Semiconductor Corp, CY8CLED16P01-28PVXIT Datasheet - Page 35

IC PLC PSOC CMOS LED 16CH 28SSOP

CY8CLED16P01-28PVXIT

Manufacturer Part Number
CY8CLED16P01-28PVXIT
Description
IC PLC PSOC CMOS LED 16CH 28SSOP
Manufacturer
Cypress Semiconductor Corp
Series
PowerPSoC® CY8CLEDr
Datasheet

Specifications of CY8CLED16P01-28PVXIT

Package / Case
28-SSOP
Core Processor
M8C
Core Size
8-Bit
Speed
24MHz
Connectivity
I²C, IrDA, SPI, UART/USART
Peripherals
LED, PLC, POR, PWM, WDT
Number Of I /o
24
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
4.75 V ~ 5.25 V
Data Converters
A/D 4x14b; D/A 4x9b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Operating Supply Voltage
4.75 V to 5.25 V
Maximum Supply Current
8 mA
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details
10.4.5 AC Digital Block Specifications
The following table lists guaranteed maximum and minimum specifications for the voltage and temperature ranges: 4.75V to 5.25V
and -40 ° C ≤ T
Table 10-17. AC Digital Block Specifications
Document Number: 001-49263 Rev. *E
Note
All
Functions
Timer
Counter
Dead Band
CRCPRS
(PRS Mode)
CRCPRS
(CRC
Mode)
SPIM
SPIS
Transmitter
Receiver
8. 50 ns minimum input pulse width is based on the input synchronizers running at 24 MHz (42 ns nominal period
Function
A
Maximum Block Clocking Frequency
Capture Pulse Width
Maximum Frequency, No Capture
Maximum Frequency, With Capture
Enable Pulse Width
Maximum Frequency, No Enable Input
Maximum Frequency, Enable Input
Kill Pulse Width:
Maximum Frequency
Maximum Input Clock Frequency
Maximum Input Clock Frequency
Maximum Input Clock Frequency
Maximum Input Clock Frequency
Width of SS_ Negated Between Transmissions
Maximum Input Clock Frequency
Vdd ≥ 4.75V, 2 Stop Bits
Maximum Input Clock Frequency
Vdd ≥ 4.75V, 2 Stop Bits
≤ 85 ° C. Typical parameters apply to 5V at 25 ° C and are for design guidance only.
Asynchronous Restart Mode
Synchronous Restart Mode
Disable Mode
Description
50
50
50
50
50
Min
20
[9]
[9]
[9]
[9]
[8]
Typ
Max
49.2
49.2
24.6
49.2
24.6
49.2
49.2
24.6
24.6
49.2
24.6
49.2
8.2
4.1
).
Units
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
ns
ns
ns
ns
ns
ns
Maximum data rate at 4.1 MHz
due to 2 x over clocking.
Maximum data rate at 3.08 MHz
due to 8 x over clocking.
Maximum data rate at 6.15 MHz
due to 8 x over clocking.
Maximum data rate at 3.08 MHz
due to 8 x over clocking.
Maximum data rate at 6.15 MHz
due to 8 x over clocking.
CY8CLED16P01
Notes
Page 35 of 46
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