C8051F305-GMR Silicon Laboratories Inc, C8051F305-GMR Datasheet - Page 97
C8051F305-GMR
Manufacturer Part Number
C8051F305-GMR
Description
IC 8051 MCU 2K FLASH 11QFN
Manufacturer
Silicon Laboratories Inc
Series
C8051F30xr
Specifications of C8051F305-GMR
Core Processor
8051
Core Size
8-Bit
Speed
25MHz
Connectivity
SMBus (2-Wire/I²C), UART/USART
Peripherals
POR, PWM, WDT
Number Of I /o
8
Program Memory Size
2KB (2K x 8)
Program Memory Type
FLASH
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
11-VQFN
For Use With
336-1444 - ADAPTER PROGRAM TOOLSTICK F300
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Data Converters
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
C8051F305-GMR
Manufacturer:
SILICONLABS/芯科
Quantity:
20 000
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11. Oscillators
C8051F300/1/2/3/4/5 devices include a programmable internal oscillator and an external oscillator drive
circuit. The internal oscillator can be enabled/disabled and calibrated using the OSCICN and OSCICL reg-
isters, as shown in Figure 11.1. The system clock can be sourced by the external oscillator circuit, the
internal oscillator, or a scaled version of the internal oscillator. The internal oscillator's electrical specifica-
tions are given in Table 11.1 on page 99.
11.1. Programmable Internal Oscillator
All C8051F300/1/2/3/4/5 devices include a programmable internal oscillator that defaults as the system
clock after a system reset. The internal oscillator period can be adjusted via the OSCICL register as
defined by SFR Definition 11.1. On C8051F300/1 devices, OSCICL is factory calibrated to obtain a
24.5 MHz frequency. On C8051F302/3/4/5 devices, the oscillator frequency is a nominal 20 MHz and may
vary ±20% from device-to-device.
Electrical specifications for the precision internal oscillator are given in Table 11.1 on page 99. The pro-
grammed internal oscillator frequency must not exceed 25 MHz. Note that the system clock may be
derived from the programmed internal oscillator divided by 1, 2, 4, or 8, as defined by the IFCN bits in reg-
ister OSCICN. The divide value defaults to 8 following a reset.
VDD
Option 2
Option 3
XTAL2
XTAL2
Option 1
Option 4
XTAL2
10M
Figure 11.1. Oscillator Diagram
XTAL1
XTAL2
OSCICL
Rev. 2.9
Circuit
Input
Programmable
Internal Clock
Generator
OSCXCN
EN
OSC
OSCICN
C8051F300/1/2/3/4/5
n
SYSCLK
97
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